MC68HC908QT2CPE Freescale, MC68HC908QT2CPE Datasheet - Page 29

• Manufacturer Part Number: MC68HC908QT2CPE
• Manufacturer: Freescale

Specifications of MC68HC908QT2CPE

• Cpu Family: HC08
• Device Core Size: 8b
• Frequency (max): 8MHz
• Total Internal Ram Size: 128Byte
• # I/os (max): 6
• Number Of Timers - General Purpose: 2
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 4-chx8-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Through Hole
• Pin Count: 8
• Package Type: PDIP
• Program Memory Type: Flash
• Program Memory Size: 1.5KB
• Lead Free Status / RoHS Status: Compliant

Freescale Semiconductor
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Addr.
↓
TIM Counter Register Low
TIM Channel 0 Status and
TIM Channel 1 Status and
Oscillator Status Register
Control Register (TSC0)
Control Register (TSC1)
Register High (TMODH)
Oscillator Trim Register
Register High (TCH0H)
Register High (TCH1H)
Register Low (TMODL)
Register Low (TCH0L)
Register Low (TCH1L)
Register Name
TIM Counter Modulo
TIM Counter Modulo
Unimplemented
Unimplemented
TIM Channel 0
TIM Channel 0
TIM Channel 1
TIM Channel 1
See page 128.
See page 129.
See page 129.
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See page 132.
See page 132.
See page 130.
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See page 96.
See page 96.
(OSCSTAT)
(OSCTRIM)
Figure 2-2. Control, Status, and Data Registers (Sheet 3 of 5)
(TCNTL)
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
MC68HC908QY/QT Family Data Sheet, Rev. 6
TRIM7
CH0F
CH1F
Bit 15
Bit 15
Bit 15
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
R
0
1
1
0
0
0
0
0
1
= Unimplemented
CH0IE
CH1IE
TRIM6
Bit 14
Bit 14
Bit 14
Bit 6
Bit 6
Bit 6
Bit 6
R
6
0
1
1
0
0
0
0
TRIM5
MS0B
Bit 13
Bit 13
Bit 13
Bit 5
Bit 5
Bit 5
Bit 5
R
5
0
1
1
0
0
0
0
0
Indeterminate after reset
Indeterminate after reset
Indeterminate after reset
Indeterminate after reset
TRIM4
MS0A
MS1A
Bit 12
Bit 12
Bit 12
Bit 4
Bit 4
Bit 4
Bit 4
R
R
4
0
1
1
0
0
0
0
= Reserved
ELS0B
ELS1B
TRIM3
Bit 11
Bit 11
Bit 11
Bit 3
Bit 3
Bit 3
Bit 3
R
3
0
1
1
0
0
0
0
ELS0A
ELS1A
TRIM2
Bit 10
Bit 10
Bit 10
U = Unaffected
Bit 2
Bit 2
Bit 2
Bit 2
R
Input/Output (I/O) Section
2
0
1
1
0
0
0
0
ECGON
TRIM1
TOV0
TOV1
Bit 1
Bit 9
Bit 1
Bit 9
Bit 1
Bit 9
Bit 1
1
0
1
1
0
0
0
0
CH0MAX
CH1MAX
ECGST
TRIM0
Bit 0
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
0
1
1
0
0
0
0
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