MC68HC908QT2CPE Freescale, MC68HC908QT2CPE Datasheet - Page 68

• Manufacturer Part Number: MC68HC908QT2CPE
• Manufacturer: Freescale

Specifications of MC68HC908QT2CPE

• Cpu Family: HC08
• Device Core Size: 8b
• Frequency (max): 8MHz
• Total Internal Ram Size: 128Byte
• # I/os (max): 6
• Number Of Timers - General Purpose: 2
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 4-chx8-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Through Hole
• Pin Count: 8
• Package Type: PDIP
• Program Memory Type: Flash
• Program Memory Size: 1.5KB
• Lead Free Status / RoHS Status: Compliant

Central Processor Unit (CPU)
68
CLI
CLR opr
CLRA
CLRX
CLRH
CLR opr,X
CLR ,X
CLR opr,SP
CMP #opr
CMP opr
CMP opr
CMP opr,X
CMP opr,X
CMP ,X
CMP opr,SP
CMP opr,SP
COM opr
COMA
COMX
COM opr,X
COM ,X
COM opr,SP
CPHX #opr
CPHX opr
CPX #opr
CPX opr
CPX opr
CPX ,X
CPX opr,X
CPX opr,X
CPX opr,SP
CPX opr,SP
DAA
DBNZ opr,rel
DBNZA rel
DBNZX rel
DBNZ opr,X,rel
DBNZ X,rel
DBNZ opr,SP,rel
DEC opr
DECA
DECX
DEC opr,X
DEC ,X
DEC opr,SP
DIV
EOR #opr
EOR opr
EOR opr
EOR opr,X
EOR opr,X
EOR ,X
EOR opr,SP
EOR opr,SP
INC opr
INCA
INCX
INC opr,X
INC ,X
INC opr,SP
Source
Form
Clear Interrupt Mask
Clear
Compare A with M
Complement (One’s Complement)
Compare H:X with M
Compare X with M
Decimal Adjust A
Decrement and Branch if Not Zero
Decrement
Divide
Exclusive OR M with A
Increment
Operation
Table 7-1. Instruction Set Summary (Sheet 3 of 6)
MC68HC908QY/QT Family Data Sheet, Rev. 6
A ← (A) – 1 or M ← (M) – 1 or X ← (X) – 1
PC ← (PC) + 3 + rel ? (result) ≠ 0
PC ← (PC) + 2 + rel ? (result) ≠ 0
PC ← (PC) + 2 + rel ? (result) ≠ 0
PC ← (PC) + 3 + rel ? (result) ≠ 0
PC ← (PC) + 2 + rel ? (result) ≠ 0
PC ← (PC) + 4 + rel ? (result) ≠ 0
M ← (M) = $FF – (M)
M ← (M) = $FF – (M)
M ← (M) = $FF – (M)
M ← (M) = $FF – (M)
A ← (A) = $FF – (M)
X ← (X) = $FF – (M)
(H:X) – (M:M + 1)
H ← Remainder
Description
A ← (H:A)/(X)
A ← (A
M ← (M) – 1
M ← (M) – 1
M ← (M) – 1
M ← (M) – 1
M ← (M) + 1
M ← (M) + 1
M ← (M) + 1
M ← (M) + 1
A ← (A) + 1
X ← (X) + 1
A ← (A) – 1
X ← (X) – 1
M ← $00
H ← $00
M ← $00
M ← $00
M ← $00
(A) – (M)
(X) – (M)
A ← $00
X ← $00
I ← 0
(A)
10
⊕
M)
V H I N Z C
U – –
– – 0 – – – INH
0 – – 0 1 –
0 – –
– – – – – –
– – – –
0 – –
– –
– –
– –
– –
– –
on CCR
Effect
1
–
–
–
Freescale Semiconductor
DIR
INH
INH
INH
IX1
IX
SP1
IMM
DIR
EXT
IX2
IX1
IX
SP1
SP2
DIR
INH
INH
IX1
IX
SP1
IMM
DIR
IMM
DIR
EXT
IX2
IX1
IX
SP1
SP2
INH
DIR
INH
INH
IX1
IX
SP1
DIR
INH
INH
IX1
IX
SP1
INH
IMM
DIR
EXT
IX2
IX1
IX
SP1
SP2
DIR
INH
INH
IX1
IX
SP1
9EE1
9ED1
9EE3
9ED3
9E6B
9E6A
9EE8
9ED8
9E6C
9E6F
9E63
8C
C1
D1
C3
D3
C8
D8
3C
4C
5C
6C
7C
9A
3F
4F
5F
6F
7F
A1
B1
E1
F1
33
43
53
63
73
65
75
A3
B3
E3
F3
72
3B
4B
5B
6B
7B
3A
4A
5A
6A
7A
52
A8
B8
E8
F8
dd
ff
ff
ii
dd
hh ll
ee ff
ff
ff
ee ff
dd
ff
ff
ii ii+1
dd
ii
dd
hh ll
ee ff
ff
ff
ee ff
dd rr
rr
rr
ff rr
rr
ff rr
dd
ff
ff
ii
dd
hh ll
ee ff
ff
ff
ee ff
dd
ff
ff
2
3
1
1
1
3
2
4
2
3
4
4
3
2
4
5
4
1
1
4
3
5
3
4
2
3
4
4
3
2
4
5
2
5
3
3
5
4
6
4
1
1
4
3
5
7
2
3
4
4
3
2
4
5
4
1
1
4
3
5