PPC405GP-3KE200C Applied Micro Circuits Corporation, PPC405GP-3KE200C Datasheet - Page 36

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PPC405GP-3KE200C

Manufacturer Part Number
PPC405GP-3KE200C
Description
Manufacturer
Applied Micro Circuits Corporation
Datasheet

Specifications of PPC405GP-3KE200C

Family Name
405GP
Device Core
PowerPC
Device Core Size
32b
Frequency (max)
200MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
2.5V
Operating Supply Voltage (max)
2.7V
Operating Supply Voltage (min)
2.3V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
456
Package Type
EBGA
Lead Free Status / RoHS Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PPC405GP-3KE200C
Manufacturer:
VIOCR
Quantity:
200
405GP – Power PC 405GP Embedded Processor
Signal Functional Description
Multiplexed signals are shown in brackets following the first signal name assigned to each multiplexed ball.
Notes:
1. Receiver input has hysteresis.
2. Must pull up. See “Pull-Up and Pull-Down Resistors” on page 29 for recommended termination values.
3. Must pull down. See “Pull-Up and Pull-Down Resistors” on page 29 for recommended termination values.
4. If not used, must pull up.
5. If not used, must pull down.
6. Strapping input during reset; pull up or pull down as required.
7. Pull-up may be required. See “External Bus Control Signals” on page 29.
36
Trace Interface
GPIO5:8[TS3:6]
GPIO9[TrcClk]
GPIO3[TS1O]
GPIO4[TS2O]
[TS1O]GPIO3
[TS2O]GPIO4
GPIO1[TS1E]
GPIO2[TS2E]
[TS1E]GPIO1
[TS2E]GPIO2
Signal Name
DrvrInh1:2
RcvrInh
TestEn
TmrClk
General Purpose I/O
or
Even Trace execution status. To access this function, software must
toggle a DCR bit.
General Purpose I/O
or
Odd Trace execution status. To access this function, software must
toggle a DCR bit.
General Purpose I/O
or
Odd Trace execution status. To access this function, software must
toggle a DCR bit.
General Purpose I/O
or
Trace status. To access this function, software must toggle a DCR
bit.
General Purpose I/O
or
Trace interface clock. A toggling signal that is always half of the CPU
core frequency. To access this function, software must toggle a DCR
bit.
Test Enable. Used only for manufacturing tests. Pull down for normal
operation.
Receiver Inhibit. Used only for manufacturing tests. Pull up for normal
operation.
Driver Inhibit 1 and 2. Used only for manufacturing tests. Pull up for
normal operation.
An external clock input that can be used to clock the timers in the
CPU core.
Even Trace execution status. To access this function, software must
toggle a DCR bit
or
General Purpose I/O.
Odd Trace execution status. To access this function, software must
toggle a DCR bit
or
General Purpose I/O.
Odd Trace execution status. To access this function, software must
toggle a DCR bit
or
General Purpose I/O.
(Part 7 of 8)
Description
Revision 2.05 – August 19, 2008
I/O[O]
I/O[O]
I/O[O]
I/O[O]
I/O[O]
O[I/O]
O[I/O]
O[I/O]
I/O
I
I
I
I
Data Sheet
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
w/pull-down
2.5V CMOS
5V tolerant
5V tolerant
5V tolerant
5V tolerant
5V tolerant
5V tolerant
5V tolerant
5V tolerant
5V tolerant
5V tolerant
5V tolerant
Type
Notes
1, 6
1, 6
1, 6
1, 6
1
1
1
2
2
1
1
AMCC

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