5962-9314402MUA QP SEMICONDUCTOR, 5962-9314402MUA Datasheet - Page 5

• Manufacturer Part Number: 5962-9314402MUA
• Manufacturer: QP SEMICONDUCTOR

Specifications of 5962-9314402MUA

• Lead Free Status / RoHS Status: Supplier Unconfirmed

DSCC FORM 2234
APR 97
marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer
has the option of not marking the "5962-" on the device. For RHA product using this option, the RHA designator shall still be
marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be
in accordance with MIL-PRF-38535, appendix A.
MIL-PRF-38535. The compliance mark for device class M shall be a "C" as required in MIL-PRF-38535, appendix A.
listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of
compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see
6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this
drawing shall affirm that the manufacturer's product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and
herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein.
device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing.
herein) involving devices acquired to this drawing is required for any change that affects this drawing.
option to review the manufacturer's facility and applicable required documentation. Offshore documentation shall be made
available onshore at the option of the reviewer.
microcircuit group number 42 (see MIL-PRF-38535, appendix A).
manufacturer prior to delivery.
specified in 4.6.
procedures and characteristics specified in 4.5.
4.5) to the specified pattern or erased (see 4.6). As a minimum, verification shall consist of performing a functional test
(subgroup 7) to verify that all bits are in the proper state. Any bit that does not verify to be in the proper state shall constitute a
device failure, and shall be removed from the lot.
reprogrammability test shall be done only for initial characterization and after any design or process changes which may affect
the reprogrammability of the device. The methods and procedures may be vendor specific, but will guarantee the number of
program/erase endurance cycles listed in section 1.3 herein. The vendors' procedure shall be under document control and shall
be made available upon request.
be done initially and after any design or process change which may affect data retention. The methods and procedures may be
vendor specific, but will guarantee the number of years listed in section 1.3 herein. The vendors procedure shall be under
document control and shall be made available upon request. Data retention capability shall be guaranteed over the full military
temperature range.
3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be
3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a "QML" or "Q" as required in
3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535
3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for
3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2
3.9 Verification and review for device class M. For device class M, DSCC, DSCC's agent, and the acquiring activity retain the
3.11 Processing EPLDs. All testing requirements and quality assurance provisions herein shall be satisfied by the
3.11.1 Erasure of EPLDs. When specified, devices shall be erased in accordance with the procedures and characteristics
3.11.2 Programmability of EPLDs. When specified, devices shall be programmed to the specified pattern using the
3.11.3 Verification of erasure or programmed EPLDs. When specified, devices shall be verified as either programmed (see
3.12 Endurance. A reprogrammability test shall be completed as part of the vendor's reliability monitor. This
3.13 Data retention. A data retention stress test shall be completed as part of the vendor's reliability process. This test shall
3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in
DEFENSE SUPPLY CENTER COLUMBUS
MICROCIRCUIT DRAWING
COLUMBUS, OHIO 43218-3990
STANDARD
SIZE
A
REVISION LEVEL
B
SHEET
5962-93144
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