DM74LS85NX Fairchild Semiconductor, DM74LS85NX Datasheet

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DM74LS85NX

Manufacturer Part Number
DM74LS85NX
Description
Manufacturer
Fairchild Semiconductor
Type
Magnitude Comparatorr
Datasheet

Specifications of DM74LS85NX

Logic Family
LS
Technology
Bipolar
High Level Output Current
-400uA
Low Level Output Current
8mA
Output Function
A<B, A=B, A>B
Package Type
PDIP
Mounting
Through Hole
Pin Count
16
Polarity
Non-Inverting
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.25V
Operating Supply Voltage (min)
4.75V
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Number Of Bits
4
Lead Free Status / RoHS Status
Supplier Unconfirmed
© 2000 Fairchild Semiconductor Corporation
DM74LS85M
DM74LS85N
DM74LS85
4-Bit Magnitude Comparator
General Description
These 4-bit magnitude comparators perform comparison of
straight binary or BCD codes. Three fully-decoded deci-
sions about two, 4-bit words (A, B) are made and are exter-
nally available at three outputs. These devices are fully
expandable to any number of bits without external gates.
Words of greater length may be compared by connecting
comparators in cascade. The A
puts of a stage handling less-significant bits are connected
to the corresponding inputs of the next stage handling
more-significant bits. The stage handling the least-
significant bits must have a high-level voltage applied to
the A
only a two-gate-level delay to reduce overall comparison
times for long words.
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Order Number
B input. The cascading path is implemented with
Package Number
M16A
N16E
B, A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
B, and A
DS006379
B out-
Features
Typical power dissipation 52 mW
Typical delay (4-bit words) 24 ns
Package Description
August 1986
Revised March 2000
www.fairchildsemi.com

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DM74LS85NX Summary of contents

Page 1

... Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram © 2000 Fairchild Semiconductor Corporation Features Typical power dissipation 52 mW Typical delay (4-bit words ...

Page 2

Function Table Comparing Inputs A3, B3 A2 ...

Page 3

Absolute Maximum Ratings Supply Voltage Input Voltage Operating Free Air Temperature Range Storage Temperature Range Recommended Operating Conditions Symbol Parameter V Supply Voltage CC V HIGH Level Input Voltage IH V LOW Level Input Voltage IL I HIGH Level Output ...

Page 4

Switching Characteristics and Symbol Parameter t Propagation Delay Time PLH LOW-to-HIGH Level Output t Propagation Delay Time PHL HIGH-to-LOW Level Output t Propagation Delay Time PLH A LOW-to-HIGH Level Output t Propagation ...

Page 5

Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow Package Number M16A 5 www.fairchildsemi.com ...

Page 6

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right ...

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