XC6VSX475T-2FFG1759E Xilinx Inc, XC6VSX475T-2FFG1759E Datasheet - Page 54

• Manufacturer Part Number: XC6VSX475T-2FFG1759E
• Description: IC FPGA VIRTEX 1759FCBGA
• Manufacturer: Xilinx Inc
• Series: Virtex™ 6 SXTr

Specifications of XC6VSX475T-2FFG1759E

• Number Of Logic Elements/cells: 476160
• Number Of Labs/clbs: 37200
• Total Ram Bits: 39223296
• Number Of I /o: 840
• Number Of Gates: -
• Voltage - Supply: 0.95 V ~ 1.05 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 1759-BBGA, FCBGA
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: XC6VSX475T-2FFG1759I; XC6VSX475T-2FFG1759I

Clock Switching Characteristics
The parameters in this section provide the necessary values for calculating timing budgets for Virtex-6 FPGA clock
transmitter and receiver data-valid windows.
Table 70: Duty Cycle Distortion and Clock-Tree Skew
DS152 (v3.2) April 1, 2011
Product Specification
Notes:
1.
2.
T
T
T
T
T
T
DCD_CLK
CKSKEW
DCD_BUFIO
BUFIOSKEW
BUFIOSKEW2
DCD_BUFR
These parameters represent the worst-case duty cycle distortion observable at the pins of the device using LVDS output buffers. For cases
where other I/O standards are used, IBIS can be used to calculate any additional duty cycle distortion that might be caused by asymmetrical
rise/fall times.
The T
skew exists for I/O registers that are close to each other and fed by the same or adjacent clock-tree branches. Use the Xilinx FPGA_Editor
and Timing Analyzer tools to evaluate clock skew specific to your application.
Symbol
CKSKEW
value represents the worst-case clock-tree skew observable between sequential I/O elements. Significantly less clock-tree
Global Clock Tree Duty Cycle
Distortion
Global Clock Tree Skew
I/O clock tree duty cycle distortion
I/O clock tree skew across one clock
region
I/O clock tree skew across three clock
regions
Regional clock tree duty cycle
distortion
(1)
Description
(2)
www.xilinx.com
XC6VLX75T
XC6VLX130T
XC6VLX195T
XC6VLX240T
XC6VLX365T
XC6VLX550T
XC6VLX760
XC6VSX315T
XC6VSX475T
XC6VHX250T
XC6VHX255T
XC6VHX380T
XC6VHX565T
Virtex-6 FPGA Data Sheet: DC and Switching Characteristics
Device
All
All
All
All
All
0.12
0.15
0.25
0.26
0.26
0.28
0.27
0.25
0.35
0.45
0.08
0.03
0.10
0.15
N/A
N/A
N/A
N/A
-3
0.12
0.16
0.26
0.27
0.27
0.29
0.50
0.51
0.28
0.39
0.26
0.37
0.47
0.46
0.08
0.03
0.12
0.15
Speed Grade
-2
0.12
0.18
0.29
0.31
0.31
0.31
0.54
0.56
0.32
0.44
0.29
0.41
0.52
0.51
0.08
0.03
0.23
0.15
-1
0.12
0.17
0.28
0.30
0.30
0.31
0.54
0.56
0.30
0.42
0.08
0.02
0.12
0.15
N/A
N/A
N/A
N/A
-1L
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
54