IDTCV128PAG8 IDT, Integrated Device Technology Inc, IDTCV128PAG8 Datasheet - Page 8

• Manufacturer Part Number: IDTCV128PAG8
• Description: IC CLK BUFFER 1-12 DIFF 56-TSSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Clock Bufferr

Specifications of IDTCV128PAG8

• Input: Clock
• Output: Clock
• Frequency - Max: 400MHz
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 56-TSSOP
• Frequency-max: 400MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: CV128PAG8

OUTPUT RELATIONAL TIMING PARAMETERS
NOTE:
1. Bypass mode, additive.
PLL BANDWIDTH AND PEAKING
IDTCV128
1-TO-12 DIFFERENTIAL CLOCK BUFFER
DIF [9:0] - DIF [11:10]
CLK_IN, DIF [x:0]
CLK_IN, DIF [x:0]
Group
Group
DIF
DIF
DIF
DIF
DIF
DIF
DIF
DIF
PLL Peaking (HIGH_BW# = 0)
PLL Peaking (HIGH_BW# = 1)
PLL Bandwidth (HIGH_BW# = 0)
PLL Bandwidth (HIGH_BW# = 1)
Output phase jitter impact
(PCIe: including BW 1.5-22Mhz)
(FBD/CSI: including BW 11-33Mhz)
Input to Output Skew in PLL mode (1:1 only)
Input to Output Skew in non PLL mode (1:1 only)
DIFF[x:0] Pin-to-Pin Skew (output within same group)
Additive skew between pin groups (group of 2 and group of 10)
Jitter, Cycle_cycle
Accumulated Differential Phase Jitter
Parameter
(1)
Parameter
8
Min.
0ps
0.7
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---
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2
-100ps
Min.
0ps
3ns
0ps
0ps
0ps
COMMERCIAL TEMPERATURE RANGE
Typ.
---
---
---
1
1
3
1
Typ.
---
---
---
---
---
---
Max.
1.4
85
40
---
2
2
4
20% of period
40% of period
+100ps
50 ps
75 ps
Max.
50ps
MHz
MHz
Unit
dB
dB
ps
ps
ps