ICS954206BFT IDT, Integrated Device Technology Inc, ICS954206BFT Datasheet - Page 13

• Manufacturer Part Number: ICS954206BFT
• Description: IC TIMING CTRL HUB P4 56-SSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Timing Control Hubr

Specifications of ICS954206BFT

• Input: Crystal
• Output: Clock
• Frequency - Max: 400MHz
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 56-SSOP
• Frequency-max: 400MHz
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 954206BFT

0940—06/23/05
I
I
I
I
2
2
2
2
C Table:Output Control Register
C Table:Output Control Register
C Table: Output Control Register
C Table: Vendor & Revision ID Register
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7
Bit 6
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 5
Byte 4
Byte 5
Byte 6
Byte 7
Integrated
Circuit
Systems, Inc.
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Pin #
Pin #
Pin #
Pin #
CPUCLK2_ITP_STOP Drive
CPUCLK2_ITP_PD Drive
PCIEX (6:0) Drive Mode
CPUCLK1_STOP Drive
CPUCLK0_STOP Drive
PCI_STOP Drive Mode
CPUCLK[1:0] PD Drive
REF_0 STRENGTH
CPUCLK2_ITP
REF_1 Enable
CPUCLK1
CPUCLK0
ITP_EN
96MHz
PCI_F1
PCI_F0
Name
Name
Name
Name
Mode
Mode
Mode
FSLC
FSLB
FSLA
Mode
Mode
RID3
RID2
RID1
RID0
VID3
VID2
VID1
VID0
SS4
SS3
SS2
SS1
SS0
LCDCLK Spread Prog Bit
LCDCLK Spread Prog Bit
LCDCLK Spread Prog Bit
LCDCLK Spread Prog Bit
LCDCLK Spread Prog Bit
PCI_STOP# or setting of
Strength Programming
Driven in CPU_STOP#
Driven in Pow erdow n
PCIEX/CPU_ITP select
Driven in PCI_STOP#
CPU_STOP# to stop
Allow assertion of
Allow assertion of
Freq Select Bit 2
Freq Select Bit 1
Freq Select Bit 0
CPUCLK outputs
Output Enable
REVISION ID
VENDOR ID
Driven in PD
Function
Function
Function
Function
Control
Control
Control
Control
(PD)
4
3
2
1
0
13
Type
Type
Type
Type
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
R
R
R
R
R
R
R
R
See Table 1: PLL1 Frequency Selection
Free Running
Free Running
Free Running
Free Running
Free Running
See Table 2: LCDCLK Freq Sel
Disable
Driven
Driven
Driven
Driven
Driven
Driven
Driven
Driven
PCIEX
96Mhz
1X
0
0
0
0
-
-
-
-
-
-
-
-
Advance Information
Table
Stoppable
Stoppable
Stoppable
Stoppable
Stoppable
CPU_ITP
100Mhz
Enable
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
2X
1
1
1
1
-
-
-
-
-
-
-
-
ICS954206B
Latched
Latched
Latched
PWD
PWD
PWD
PWD
latch
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
0
0
0
x
x
x
x
0
0
0
1