ICS954206BFT IDT, Integrated Device Technology Inc, ICS954206BFT Datasheet - Page 3

• Manufacturer Part Number: ICS954206BFT
• Description: IC TIMING CTRL HUB P4 56-SSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Timing Control Hubr

Specifications of ICS954206BFT

• Input: Crystal
• Output: Clock
• Frequency - Max: 400MHz
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 56-SSOP
• Frequency-max: 400MHz
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 954206BFT

Pin Description (Continued)
0940—06/23/05
PIN #
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
GND
PCIEXC4
PCIEXT4
PEREQ2#*/PCIEXC5
PEREQ1#*/PCIEXT5
VDDPCIEX
CPUCLKC2_ITP/PCIEXC6
CPUCLKT2_ITP/PCIEXT6
VDDA
GNDA
IREF
CPUCLKC1
CPUCLKT1
VDDCPU
CPUCLKC0
CPUCLKT0
GND
SCLK
SDATA
VDDREF
X2
X1
GND
REF0
REF1/FSLC/TEST_SEL
CPU_STOP#
PCI/SRC_STOP#
PCICLK2/REQ_SEL**
Integrated
Circuit
Systems, Inc.
PIN NAME
TYPE
PWR
OUT
OUT
PWR
OUT
OUT
PWR
PWR
OUT
OUT
OUT
PWR
OUT
OUT
PWR
PWR
OUT
PWR
OUT
I/O
I/O
I/O
I/O
I/O
IN
IN
IN
IN
Ground pin.
Complement clock of differential PCI_Express pair.
True clock of differential PCI_Express pair.
Real-time input pin that controls SATACLK and PCIEXCLK outputs that are
selected through the I2c. 1 = disabled, 0 = enabled. / Complement clock of
differential PCI Express output.
Real-time input pin that controls SATACLK and PCIEXCLK outputs that are
selected through the I2c. 1 = disabled, 0 = enabled. / True clock of
differential PCI Express output.
Power supply for PCI Express clocks, nominal 3.3V
Complimentary clock of CPU_ITP/PCIEX differential pair CPU_ITP/PCIEX
output. These are current mode outputs. External resistors are required
for voltage bias. Selected by ITP_EN input.
True clock of differential pair CPU outputs. These are current mode
outputs. External resistors are required for voltage bias. / True clock of
differential PCIEX pair
3.3V power for the PLL core.
Ground pin for the PLL core.
This pin establishes the reference current for the differential current-mode
output pairs. This pin requires a fixed precision resistor tied to ground in
order to establish the appropriate current. 475 ohms is the standard value.
Complimentary clock of differential pair CPU outputs. These are current
mode outputs. External resistors are required for voltage bias.
True clock of differential pair CPU outputs. These are current mode
outputs. External resistors are required for voltage bias.
Supply for CPU clocks, 3.3V nominal
Complimentary clock of differential pair CPU outputs. These are current
mode outputs. External resistors are required for voltage bias.
True clock of differential pair CPU outputs. These are current mode
outputs. External resistors are required for voltage bias.
Ground pin.
Clock pin of SMBus circuitry, 5V tolerant.
Data pin for SMBus circuitry, 5V tolerant.
Ref, XTAL power supply, nominal 3.3V
Crystal output, Nominally 14.318MHz
Crystal input, Nominally 14.318MHz.
Ground pin.
14.318 MHz reference clock.
14.318 MHz reference clock./ 3.3V tolerant input for CPU frequency
selection. Refer to input electrical characteristics for Vil_FS and Vih_FS
values. /TEST_Sel: 3-level latched input to enable test mode.
Refer to Test Clarification Table
Stops all CPUCLK, except those set to be free running clocks
Stops all PCICLKs and SRCCLKs besides the free-running clocks at logic 0
level, when input low
3.3V PCI clock output / Latch select input pin. 0 = PCIEXCLK5 1 = PEREQ
3
DESCRIPTION
Advance Information
ICS954206B