ICS8305AGILF IDT, Integrated Device Technology Inc, ICS8305AGILF Datasheet - Page 12

• Manufacturer Part Number: ICS8305AGILF
• Description: IC CLK FAN BUFF MUX 2:4 16TSSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Fanout Buffer (Distribution), Multiplexerr
• Series: HiPerClockS™r

Specifications of ICS8305AGILF

• Number Of Circuits: 1
• Ratio - Input:output: 2:4
• Differential - Input:output: Yes/No
• Input: HCSL, LVCMOS, LVDS, LVHSTL, LVPECL, LVTTL, SSTL
• Output: LVCMOS, LVTTL
• Frequency - Max: 350MHz
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-TSSOP
• Frequency-max: 350MHz
• Number Of Clock Inputs: 2
• Output Frequency: 350MHz
• Output Logic Level: LVCMOS/LVTTL
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.465V
• Package Type: TSSOP
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 16
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 800-1947-5; 8305AGILF; ICS8305AGILF

IDT™ / ICS™ LOW SKEW, 1-TO-4, MULTIPLEXED DIFFERENTIAL/ LVCMOS-TO-LVCMOS/ LVTTL FANOUT BUFFER
ICS8305I
LOW SKEW, 1-TO-4, MULTIPLEXED DIFFERENTIAL/ LVCMOS-TO-LVCMOS/ LVTTL FANOUT BUFFER
S
This application note provides general design guide using
ICS8305I LVCMOS buffer. Figure 4 shows a schematic example
of the ICS8305I LVCMOS clock buffer. In this example, the input
8305AGI
T
T
The transistor count for ICS8305I is: 459
ABLE
RANSISTOR
CHEMATIC
VDD
6.
Single-Layer PCB, JEDEC Standard Test Boards
Multi-Layer PCB, JEDEC Standard Test Boards
NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
3,.3V LVCMOS
JA
Ro ~ 7 Ohm
C
E
VS
OUNT
XAMPLE
Integrated
Circuit
Systems, Inc.
. A
R3
IR
VDD
F
F
LOW
R4
1K
43
IGURE
T
Zo = 50
ABLE FOR
1K
R5
4. E
XAMPLE
16 L
JA
R
R6
1K
by Velocity (Linear Feet per Minute)
ELIABILITY
www.icst.com/products/hiperclocks.html
ICS8305I LVCMOS C
EAD
VDD
1
2
3
4
5
6
7
8
U1
TSSOP
GND
OE
VDD
CLK_EN
CLK
nCLK
CLK_SEL
LVCMOS_CLK
ICS8305
VDD=3.3V
LVCMOS-
L
OW
12
I
12
NFORMATION
is driven by an LVCMOS driver. CLK_EN is set at logic low to
select LVCMOS_CLK input.
VDDO
VDDO
S
GND
GND
137.1°C/W
Q0
Q1
Q2
Q3
89.0°C/W
KEW
LOCK
0
16
15
14
13
12
11
10
9
TO
(U1,3)
, 1-
-LVCMOS/LVTTL F
O
C1
0.1u
VDD
UTPUT
TO
(U1,11)
-4, M
C2
0.1u
B
118.2°C/W
UFFER
81.8°C/W
200
(U1,15)
R1
43
R2
43
ULTIPLEXED
C3
0.1u
S
CHEMATIC
Zo = 50
Zo = 50
106.8°C/W
78.1°C/W
ANOUT
500
D
IFFERENTIAL
LVCMOS Receiv er
LVCMOS Receiv er
REV. B MAY 19, 2005
B
UFFER
ICS8305I
TSD
/