ICS8543BGLF IDT, Integrated Device Technology Inc, ICS8543BGLF Datasheet - Page 11

IC FANOUT BUFF DIFF-LVDS 20TSSOP

ICS8543BGLF

Manufacturer Part Number
ICS8543BGLF
Description
IC FANOUT BUFF DIFF-LVDS 20TSSOP
Manufacturer
IDT, Integrated Device Technology Inc
Type
Fanout Buffer (Distribution), Multiplexerr
Series
HiPerClockS™r
Datasheet

Specifications of ICS8543BGLF

Number Of Circuits
1
Ratio - Input:output
2:4
Differential - Input:output
Yes/Yes
Input
CML, HCSL, LVDS, LVHSTL, LVPECL, SSTL
Output
LVDS
Frequency - Max
800MHz
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
20-TSSOP
Frequency-max
800MHz
Number Of Clock Inputs
2
Mode Of Operation
Differential
Output Frequency
800MHz
Output Logic Level
LVDS
Operating Supply Voltage (min)
3.135V
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.465V
Package Type
TSSOP
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
20
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
800-1186
800-1186-5
800-1186
8543BGLF

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ICS8543BGLF
Manufacturer:
IDT
Quantity:
755
Part Number:
ICS8543BGLFT
Manufacturer:
IDT
Quantity:
20 000
ICS8543 Data Sheet
3.3V Differential Clock Input Interface
The CLK /nCLK accepts LVDS, LVPECL, LVHSTL, SSTL, HCSL and
other differential signals. Both V
and V
examples for the CLK/nCLK input driven by the most common driver
types. The input interfaces suggested here are examples only.
Figure 3A. CLK/nCLK Input Driven by an
Figure 3C. CLK/nCLK Input Driven by a
Figure 3E. CLK/nCLK Input Driven by a
ICS8543BG REVISION E DECEMBER 17, 2010
CMR
3.3V
1.8V
3.3V
HCSL
LVPECL
input requirements. Figures 3A to 3F show interface
*Optional – R3 and R4 can be 0Ω
LVHSTL
IDT
LVHSTL Driver
IDT Open Emitter LVHSTL Driver
3.3V LVPECL Driver
3.3V HCSL Driver
*R3
*R4
Zo = 50Ω
Zo = 50Ω
Zo = 50Ω
Zo = 50Ω
33Ω
33Ω
Zo = 50Ω
Zo = 50Ω
SWING
R3
125Ω
R1
50Ω
3.3V
R1
84Ω
R1
50Ω
and V
R4
125Ω
R2
50Ω
R2
84Ω
OH
R2
50Ω
must meet the V
CLK
nCLK
CLK
nCLK
CLK
nCLK
3.3V
3.3V
3.3V
Differential
Input
Differential
Input
Differential
Input
PP
11
Please consult with the vendor of the driver component to confirm the
driver termination requirements. For example, in Figure 3A, the input
termination applies for IDT open emitter LVHSTL drivers. If you are
using an LVHSTL driver from another vendor, use their termination
recommendation.
Figure 3B. CLK/nCLK Input Driven by a
Figure 3D. CLK/nCLK Input Driven by a 3.3V LVDS Driver
Figure 3F. CLK/nCLK Input Driven by a 2.5V SSTL Driver
2.5V
3.3V
3.3V
LVDS
SSTL
LVPECL
3.3V LVPECL Driver
LOW SKEW, 1-to-4, DIFFERENTIAL-TO-LVDS FANOUT BUFFER
Zo = 60Ω
Zo = 60Ω
Zo = 50Ω
Zo = 50Ω
Zo = 50Ω
Zo = 50Ω
R3
120Ω
2.5V
R1
120Ω
R1
50Ω
©2010 Integrated Device Technology, Inc.
R2
50Ω
R4
120Ω
R2
120Ω
R2
50Ω
R1
100Ω
CLK
nCLK
CLK
nCLK
CLK
nCLK
3.3V
3.3V
3.3V
Differential
Input
Differential
Input
Receiver

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