STW81102ATR STMicroelectronics, STW81102ATR Datasheet - Page 12

• Manufacturer Part Number: STW81102ATR
• Description: IC SYNTHESIZER MULTI RF 28VFQFPN
• Manufacturer: STMicroelectronics
• Type: Frequency Synthesizerr

Specifications of STW81102ATR

• Pll: Yes
• Input: Clock, Crystal
• Output: Clock, Crystal
• Number Of Circuits: 1
• Ratio - Input:output: 3:2
• Differential - Input:output: No/No
• Frequency - Max: 4.65GHz
• Divider/multiplier: Yes/No
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 28-VFQFN, 28-VFQFPN
• Frequency-max: 4.65GHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Electrical specifications
Table 5.
1. In order to achieve best phase noise performance 1V peak level is suggested.
2. The frequency step is related to the PFD input frequency as follows:
3. See relationship between ICP and REXT in
4. The level of the spurs may change depending on PFD frequency, charge pump current, selected channel and PLL loop
5. Guaranteed by design and characterization.
6. When setting a specified output frequency, the VCO calibration procedure must be run in order to select the best sub-range
7. Frequency jump from 2300 to 2150 MHz; it includes the time required by the VCO calibration procedure (7 F
12/53
External VCO
PLL miscellaneous
Symbol
- F
- F
- F
BW.
for the VCO covering the desired frequency. Once programmed at the initial temperature T
temperature range (-40 ° C to +85 ° C), the synthesizer is able to maintain the lock status only if the temperature drift (in
either direction) is within the limit specified by
If higher
calibration procedure automatically when the part loose the lock condition (trigger on lock detector signal)
F
I
t
PFD
PLL
lock
STEP
STEP
STEP
=400kHz).
= F
= F
= F
Δ
T are required the ” VCO calibration auto-restart “ feature can be enabled, thus allowing to re-start the VCO
Frequency range
Input level
Current consumption
Current consumption
Lock up time
PFD
PFD
PFD
Electrical specifications (continued)
/2 for divided by 2 output
/4 for divided by 4 output
for direct output
Parameter
(5), (7)
Section 5.7: Charge pump
VCO internal buffer
Input buffer, prescaler, digital
dividers, misc.
25kHz PLL bandwidth; within
1 ppm of frequency error
Δ
T
LK
, provided that the final temperature T
Test conditions
.
0.625
Min
-10
1
is still inside the nominal range.
0
inside the operating
Typ
150
28
12
Max
PFD
+6
5
cycles with
STW81102
GHz
dBm
Unit
mA
mA
µs