STW81102ATR STMicroelectronics, STW81102ATR Datasheet - Page 40

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STW81102ATR

Manufacturer Part Number
STW81102ATR
Description
IC SYNTHESIZER MULTI RF 28VFQFPN
Manufacturer
STMicroelectronics
Type
Frequency Synthesizerr
Datasheet

Specifications of STW81102ATR

Pll
Yes
Input
Clock, Crystal
Output
Clock, Crystal
Number Of Circuits
1
Ratio - Input:output
3:2
Differential - Input:output
No/No
Frequency - Max
4.65GHz
Divider/multiplier
Yes/No
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
28-VFQFN, 28-VFQFPN
Frequency-max
4.65GHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Quantity
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STW81102ATR
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0
SPI digital interface
7.3.1
7.4
7.4.1
40/53
The LO output frequency is programmed by setting the proper values for A, B and R
according to the following formula:
where D
and P is the selected prescaler modulus.
Default configuration
At power on, all the bits are set to ‘0’. Consequently the part starts in power down mode.
VCO calibration procedure
Calibration of the VCO center frequency is activated when the SERCAL bit (ST1 register
bit[6]) is set to 1.
To program the device properly while ensuring VCO calibration, perform the following steps
before every channel change:
1.
2.
The maximum allowed PFD frequency (F
higher than 1 MHz, perform the following additional steps:
VCO calibration auto-restart feature
The VCO calibration auto-restart feature can be enabled in two steps:
1.
2.
F OUT
Program the ST2 register with the desired settings (functional mode, B and A
counters).
Program the ST1 register with the desired settings (R counter, VCO amplitude, charge
pump, prescaler modulus) and with the SERCAL bit set to 1.
Perform all the steps (step 1 and 2 above) of the calibration procedure, making sure to
program the desired VCO frequency with proper settings of the R, B and A counters so
that F
Program the device with the desired VCO and PFD frequency settings as per steps 1
and 2 above with SERCAL bit set to 0.
set the desired frequency ensuring VCO calibration as described above (
program the ST2 register with the CAL_AUTOSTART_EN bit set to '1' while keeping
unchanged the others.
=
R
D R
equals
PFD
×
is ≤ 1 MHz.
(
B
×
P
+
A
{
)
×
F REF CLK
---------------------------------- -
1
0.5
0.25 for output divided by 4
R
for direct output
for output divided by 2
PFD
) during calibration is 1 MHz; if you want a F
Section 7.4
STW81102
PFD
)

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