DS1073M-100 Maxim Integrated Products, DS1073M-100 Datasheet - Page 5

• Manufacturer Part Number: DS1073M-100
• Description: ECONOSCILLATOR/DIV 100MHZ 8-DIP
• Manufacturer: Maxim Integrated Products
• Series: EconOscillator™r
• Type: Oscillator, Fixed Frequency, Dualr

Specifications of DS1073M-100

• Frequency: 100MHz
• Voltage - Supply: 2.7 V ~ 3.6 V
• Current - Supply: 25mA
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-DIP (0.300", 7.62mm)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Count: -

Table 2
DIV WORD Figure 3
PDN
This bit is used to determine the function of the
used to determine the timing reference (either the internal oscillator or an external reference/crystal). If
PDN = 1, the
This bit is used to determine whether the OUT0 pin is active or not. If
impedance). If
effect on OUT0, but OUT0 is disabled as part of the power-down sequence.
N
These nine bits determine the value of the programmable divider. The range of divisor values is from 2 to
513, and is equal to the programmed value of N plus 2:
Table 3
NOTE:
The maximum value of N is constrained by the minimum output frequency. If the internal clock is
selected, INTOSC/(M*N) must be greater than f
be greater than f
EN0
*Assuming PDN bit = 1, otherwise internal/external selection will be controlled by the
(MSB)
DIV1
BIT
0
0
0
0
1
1
1
1
000000000
000000001
111111111
VALUES
BIT
.
.
.
.
.
PDN
BIT*
E/ I
OUTmin
EN0
0
0
0
1
0
0
0
1
/
SELX
= 0, the internal reference clock (MCLK) is output from OUT0. The OE pin has no
. (If DIV1 = 1, then INTOSC or EXTCLK, as applicable, must exceed f
pin is used to put the device into power-down mode.
MSEL
BIT
X
X
0
0
1
1
0
0
DIVISOR (N)
VALUE
513
2
3
.
.
.
.
.
BIT
M
X
X
X
X
0
1
0
1
N (9-BITS)
OUTmin
PDN
INTERNAL OSCILLATOR DIVIDED BY 4*N
INTERNAL OSCILLATOR DIVIDED BY 2*N
INTERNAL OSCILLATOR DIVIDED BY N
EXTERNAL OSCILLATOR DIVIDED BY N
INTERNAL OSCILLATOR DIVIDED BY 1
INTERNAL OSCILLATOR DIVIDED BY 4
INTERNAL OSCILLATOR DIVIDED BY 2
EXTERNAL OSCILLATOR DIVIDED BY 1
5 of 18
/
; if the external clock is selected, EXTCLK/N must
SELX
pin. If PDN = 0, the
OPERATION
EN0
= 1, OUT0 is disabled (High-
PDN
/
PDN
SELX
/
SELX
OUTmin
pin can be
(LSB)
).
pin.