CS5529-ASZ Cirrus Logic Inc, CS5529-ASZ Datasheet - Page 26
![IC ADC 16BIT W/6BIT LATCH 20SSOP](/photos/6/60/66044/cs5529-asz_sml.jpg)
CS5529-ASZ
Manufacturer Part Number
CS5529-ASZ
Description
IC ADC 16BIT W/6BIT LATCH 20SSOP
Manufacturer
Cirrus Logic Inc
Datasheet
1.CS5529-ASZ.pdf
(31 pages)
Specifications of CS5529-ASZ
Number Of Converters
1
Package / Case
20-SSOP
Number Of Bits
16
Data Interface
Serial
Power Dissipation (max)
3.5mW
Voltage Supply Source
Analog and Digital, Dual ±
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Number Of Adc Inputs
1
Architecture
Delta-Sigma
Conversion Rate
101 SPs
Resolution
24 bit
Input Type
Voltage
Interface Type
Serial (3-Wire)
Voltage Reference
2.5 V
Maximum Power Dissipation
8 mW
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1015 - EVAL BOARD FOR CS5529
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
598-1110-5
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
CS5529-ASZ
Manufacturer:
CIRRUS
Quantity:
88
Part Number:
CS5529-ASZ
Manufacturer:
CIRRUS
Quantity:
20 000
Part Number:
CS5529-ASZR
Manufacturer:
CIRRUS
Quantity:
20 000
PIN DESCRIPTIONS
Clock Generator
XIN; XOUT - Crystal In; Crystal Out, Pins 10, 11.
Control Pins and Serial Data I/O
CS - Chip Select, Pin 8.
SDI - Serial Data Input, Pin 15.
SDO - Serial Data Output, Pin 14.
SCLK - Serial Clock Input, Pin 9.
26
DIFFERENTIAL ANALOG INPUT
DIFFERENTIAL ANALOG INPUT
NEGATIVE ANALOG POWER
A gate inside the chip is connected to these pins and can be used with a crystal to provide the
master clock for the device. Alternatively, an external (CMOS compatible) clock (powered
relative to VD+) can be supplied into the XIN pin to provide the master clock for the device.
When active low, the port will recognize SCLK. When high the SDO pin will output a high
impedance state. CS should be changed when SCLK = 0.
SDI is the input pin of the serial input port. Data will be input at a rate determined by SCLK.
A clock signal on this pin determines the input/output rate of the data for the SDI/SDO pins
respectively. This input is a Schmitt trigger to allow for slow rise time signals. The SCLK pin
will recognize clocks only when CS is low.
POSITIVE ANALOG POWER
SDO is the serial data output. It will output a high impedance state if CS = 1.
LOGIC OUTPUT (ANALOG)
LOGIC OUTPUT (ANALOG)
LOGIC OUTPUT (DIGITAL)
SERIAL CLOCK INPUT
CRYSTAL OUT
CHIP SELECT
XOUT
SCLK
AIN+
AIN-
VA+
VA-
CS
A0
A1
D0
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
VREF+
VREF-
D3
D2
D1
SDI
SDO
VD+
DGND
XIN
VOLTAGE REFERENCE INPUT
VOLTAGE REFERENCE INPUT
LOGIC OUTPUT (DIGITAL)
LOGIC OUTPUT (DIGITAL)
LOGIC OUTPUT (DIGITAL)
SERIAL DATA INPUT
SERIAL DATA OUTPUT
POSITIVE DIGITAL POWER
DIGITAL GROUND
CRYSTAL IN
CS5529
DS246F5