CS5529-ASZ Cirrus Logic Inc, CS5529-ASZ Datasheet - Page 3

• Manufacturer Part Number: CS5529-ASZ
• Description: IC ADC 16BIT W/6BIT LATCH 20SSOP
• Manufacturer: Cirrus Logic Inc

Specifications of CS5529-ASZ

• Number Of Converters: 1
• Package / Case: 20-SSOP
• Number Of Bits: 16
• Data Interface: Serial
• Power Dissipation (max): 3.5mW
• Voltage Supply Source: Analog and Digital, Dual ±
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Number Of Adc Inputs: 1
• Architecture: Delta-Sigma
• Conversion Rate: 101 SPs
• Resolution: 24 bit
• Input Type: Voltage
• Interface Type: Serial (3-Wire)
• Voltage Reference: 2.5 V
• Maximum Power Dissipation: 8 mW
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1015 - EVAL BOARD FOR CS5529
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 598-1110-5

LIST OF FIGURES
Contacting Cirrus Logic Support
For all product questions and inquiries contact a Cirrus Logic Sales Representative.
To find the one nearest to you go to
IMPORTANT NOTICE
Cirrus Logic, Inc. and its subsidiaries (“Cirrus”) believe that the information contained in this document is accurate and reliable. However, the information is subject to
change without notice and is provided “AS IS” without warranty of any kind (express or implied). Customers are advised to obtain the latest version of relevant infor
mation to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied
at the time of order acknowledgment, including those pertaining to warranty, indemnification, and limitation of liability. No responsibility is assumed by Cirrus for the
use of this information, including use of this information as the basis for manufacture or sale of any items, or for infringement of patents or other rights of third parties
This document is the property of Cirrus and by furnishing this information, Cirrus grants no license, express or implied under any patents, mask work rights, copyrights
trademarks, trade secrets or other intellectual property rights. Cirrus owns the copyrights associated with the information contained herein and gives consent for copies
to be made of the information only for use within your organization with respect to Cirrus integrated circuits or other products of Cirrus. This consent does not extend
to other copying such as copying for general distribution, advertising or promotional purposes, or for creating any work for resale.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPER
TY OR ENVIRONMENTAL DAMAGE (“CRITICAL APPLICATIONS”). CIRRUS PRODUCTS ARE NOT DESIGNED, AUTHORIZED OR WARRANTED FOR USE IN
AIRCRAFT SYSTEMS, MILITARY APPLICATIONS, PRODUCTS SURGICALLY IMPLANTED INTO THE BODY, AUTOMOTIVE SAFETY OR SECURITY DEVICES
LIFE SUPPORT PRODUCTS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF CIRRUS PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE
FULLY AT THE CUSTOMER'S RISK AND CIRRUS DISCLAIMS AND MAKES NO WARRANTY, EXPRESS, STATUTORY OR IMPLIED, INCLUDING THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR PARTICULAR PURPOSE, WITH REGARD TO ANY CIRRUS PRODUCT THAT IS USED IN SUCH A
MANNER. IF THE CUSTOMER OR CUSTOMER'S CUSTOMER USES OR PERMITS THE USE OF CIRRUS PRODUCTS IN CRITICAL APPLICATIONS, CUSTOM
ER AGREES, BY SUCH USE, TO FULLY INDEMNIFY CIRRUS, ITS OFFICERS, DIRECTORS, EMPLOYEES, DISTRIBUTORS AND OTHER AGENTS FROM ANY
AND ALL LIABILITY, INCLUDING ATTORNEYS' FEES AND COSTS, THAT MAY RESULT FROM OR ARISE IN CONNECTION WITH THESE USES.
Cirrus Logic, Cirrus, and the Cirrus Logic logo designs are trademarks of Cirrus Logic, Inc. All other brand and product names in this document may be trademarks o
service marks of their respective owners.
DS246F5
F4
F5
REVISION HISTORY
Revision
Sep ‘04
Aug ‘05
Date
Input models for AIN+ and AIN- pins......................................................... 11
Input model for VREF+ and VREF- pins. .................................................. 11
CS5529 Register Diagram. ....................................................................... 11
Command and Data Word Timing. ............................................................ 14
Filter Response (Normalized to Output Word Rate = 1)............................ 16
Self Calibration of Offset. .......................................................................... 18
Self Calibration of Gain. ............................................................................ 18
System Calibration of Offset...................................................................... 18
System Calibration of Gain........................................................................ 19
CS5529 Configured with a +5.0 V Analog Supply..................................... 23
CS5529 Configured with ±2.5 V Analog Supplies. .................................... 23
CS5529 Configured with ±3.0 V Supplies. ................................................ 24
Added lead-free device ordering information..
Updated legal notice. Added MSL data.
www.cirrus.com
Changes
CS5529
3