ADC1002S020HL/C1,1 NXP Semiconductors, ADC1002S020HL/C1,1 Datasheet - Page 15

IC ADC 10BIT PAR 20MHZ 32-LQFP

ADC1002S020HL/C1,1

Manufacturer Part Number
ADC1002S020HL/C1,1
Description
IC ADC 10BIT PAR 20MHZ 32-LQFP
Manufacturer
NXP Semiconductors
Datasheet

Specifications of ADC1002S020HL/C1,1

Number Of Bits
10
Sampling Rate (per Second)
20M
Data Interface
Parallel
Number Of Converters
1
Power Dissipation (max)
73mW
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
32-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
935286648118
ADC1002S020HL/C1-T
ADC1002S020HL/C1-T

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADC1002S020HL/C1,1
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
NXP Semiconductors
12. Application information
ADC1002S020_2
Product data sheet
12.1 Application diagram
Fig 15. Application diagram
(1) RB, RM and RT are decoupled to V
(2) Pins 8, 12, 13, 17, 24 and 32 should be connected to the closest ground pin in order to prevent
(3) When RM is not used, pin 11 can be left open circuit, avoiding the decoupling capacitor. In any
(4) When the analog input signal is AC coupled, an input bias or a clamping level must be applied to VI
The analog and digital supplies should be separated and decoupled.
The external voltage reference generator must be built in such a way that a good supply voltage
ripple rejection is achieved with respect to the LSB value. Eventually, the reference ladder voltages
can be derived from a well regulated V
capacitor.
noise influence
case, pin 11 must not be grounded.
input (pin 14).
STDBY
V
V
n.c.
V
DDD1
SSD1
CLK
DDA
D9
(2)
IR
1
2
3
4
5
6
7
8
100 nF
32
9
Rev. 02 — 13 August 2008
n.c.
V
V
SSA
SSA
(2)
10
31
RB
D8
V
(1)
SSA
100 nF
11
30
RM
(3)
D7
SSA
(1)
ADC1002S020
DDA
29
12
D6
n.c.
supply through a resistor bridge and a decoupling
(2)
13
28
D5
n.c.
(2)
14
27
Single 10 bits ADC, up to 20 MHz
D4
VI
V
(4)
SSA
ADC1002S020
100 nF
15
26
RT
D3
(1)
16
25
24
23
22
21
20
19
18
17
D2
OE
© NXP B.V. 2008. All rights reserved.
D1
D0
V
V
V
V
n.c.
014aaa490
n.c.
SSO
DDO
SSD2
DDD2
(2)
(2)
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