MAX197BENI+ Maxim Integrated Products, MAX197BENI+ Datasheet - Page 4

• Manufacturer Part Number: MAX197BENI+
• Description: IC DAS 12BIT SNGL 28-DIP
• Manufacturer: Maxim Integrated Products
• Type: Data Acquisition System (DAS)r

Specifications of MAX197BENI+

• Resolution (bits): 12 b
• Sampling Rate (per Second): 100k
• Data Interface: Parallel
• Voltage Supply Source: Single Supply
• Voltage - Supply: 4.75 V ~ 5.25 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Through Hole
• Package / Case: 28-DIP (0.300", 7.62mm)
• Number Of Adc Inputs: 8
• Architecture: SAR
• Conversion Rate: 100 KSPs
• Resolution: 12 bit
• Input Type: Voltage
• Voltage Reference: Internal 4.096 V or External
• Supply Voltage (max): 5 V
• Maximum Power Dissipation: 1143 mW
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• Input Voltage: 10 V
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Multi-Range (±10V, ±5V, +10V, +5V),
Single +5V, 12-Bit DAS with 8+4 Bus Interface
ELECTRICAL CHARACTERISTICS (continued)
(V
with 50% duty cycle; T
4
Supply Voltage
POWER REQUIREMENTS
Supply Current
Power-Supply Rejection Ratio
(Note 8)
TIMING
Internal Clock Frequency
External Clock Frequency Range
Acquisition Time
Conversion Time
Throughput Rate
Bandgap Reference
Start-Up Time
Reference Buffer Settling
DIGITAL INPUTS (D7–D0, CLK, RD, WR, CS, HBEN, SHDN) (Note 11)
Input High Voltage
Input Low Voltage
Input Leakage Current
Input Capacitance
DIGITAL OUTPUTS (D7–D4, D3/D11, D2/D10, D1/D9, D0/D8, INT)
Output Low Voltage
Output High Voltage
Three-State Output Capacitance
DD
_______________________________________________________________________________________
= 5V ±5%; unipolar/bipolar range; external reference mode, V
PARAMETER
A
= T
MIN
to T
SYMBOL
MAX
t
t
PSRR
C
t
ACQE
CONV
V
f
f
V
V
V
ACQI
V
C
I
CLK
CLK
I
OUT
DD
INH
INL
DD
IN
OH
, unless otherwise noted.)
OL
IN
To 0.1mV REF bypass
capacitor fully discharged
Normal mode, bipolar ranges
Normal mode, unipolar ranges
Standby power-down (STBYPD)
Full power-down mode (FULLPD) (Note 7)
External reference = 4.096V
Internal reference
C
Internal acquisition
External acquisition (Note 9)
After FULLPD or STBYPD
External CLK
Internal CLK, C
External CLK
Internal CLK, C
Power-up (Note 10)
V
(Note 5)
V
V
(Note 5)
IN
DD
DD
CLK
= 0V or V
= 4.75V, I
= 4.75V, I
= 100pF
DD
SINK
SOURCE
CLK
CLK
CONDITIONS
= 1.6mA
= 100pF
= 100pF
REF
= 1mA
External CLK
Internal CLK
= 4.096V; 4.7µF at REF pin; external clock, f
C
C
REF
REF
= 4.7µF
= 33µF
V
4.75
1.25
DD
MIN
0.1
3.0
3.0
3.0
6.0
6.0
2.4
62
- 1
TYP
±
1.56
700
200
7.7
60
6
1
5
8
/
2
MAX
5.25
±
2.00
10.0
±10
850
120
100
2.0
5.0
0.8
0.4
18
10
15
15
1
CLK
/
2
= 2.0MHz
UNITS
MHz
MHz
ksps
LSB
mA
ms
µA
µA
pF
pF
µs
µs
µs
V
V
V
V
V