PIC18F65K90-I/MR Microchip Technology, PIC18F65K90-I/MR Datasheet - Page 349

• Manufacturer Part Number: PIC18F65K90-I/MR
• Description: 32kB Flash, 2kB RAM, 1kB EE, NanoWatt XLP, LCD 64 QFN 9x9x0.9mm TUBE
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F65K90-I/MR

• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 32 KB
• Data Ram Size: 2 KB
• Interface Type: I2C, SPI
• Maximum Clock Frequency: 64 MHz
• Number Of Timers: 8
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 16 Channel
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 64MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 53
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN Exposed Pad
• Lead Free Status / Rohs Status: Details

22.0
The Enhanced Universal Synchronous Asynchronous
Receiver Transmitter (EUSART) module is one of two
serial I/O modules. (Generically, the EUSART is also
known as a Serial Communications Interface or SCI.)
The EUSART can be configured as a full-duplex,
asynchronous system that can communicate with
peripheral devices, such as CRT terminals and
personal computers. It can also be configured as a
half-duplex synchronous system that can communicate
with peripheral devices, such as A/D or D/A integrated
circuits, serial EEPROMs, etc.
The Enhanced USART module implements additional
features, including automatic baud rate detection and
calibration, automatic wake-up on Sync Break recep-
tion and 12-bit Break character transmit. These make it
ideally suited for use in Local Interconnect Network bus
(LIN/J2602 bus) systems.
All members of the PIC18F87K90 family are equipped
with two independent EUSART modules, referred to as
EUSART1 and EUSART2. They can be configured in
the following modes:
• Asynchronous (full duplex) with:
• Synchronous – Master (half duplex) with
• Synchronous – Slave (half duplex) with selectable
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- Auto-wake-up on character reception
- Auto-baud calibration
- 12-bit Break character transmission
selectable clock polarity
clock polarity
ENHANCED UNIVERSAL
SYNCHRONOUS
ASYNCHRONOUS RECEIVER
TRANSMITTER (EUSART)
PIC18F87K90 FAMILY
The pins of EUSART1 and EUSART2 are multiplexed
with
SEG27 and
(RG1/TX2/CK2/AN19/C3OUT
AN18/C3INA), respectively. In order to configure
these pins as an EUSART:
• For EUSART1:
• For EUSART2:
The operation of each Enhanced USART module is
controlled through three registers:
• Transmit Status and Control (TXSTAx)
• Receive Status and Control (RCSTAx)
• Baud Rate Control (BAUDCONx)
These are detailed in
Register
- SPEN (RCSTA1<7>) bit must be set (= 1)
- TRISC<7> bit must be set (= 1)
- TRISC<6> bit must be cleared (= 0) for
- TRISC<6> bit must be set (= 1) for
- SPEN (RCSTA2<7>) bit must be set (= 1)
- TRISG<2> bit must be set (= 1)
- TRISG<1> bit must be cleared (= 0) for
- TRISC<6> bit must be set (= 1) for
Note:
Note:
Asynchronous and Synchronous Master
modes
Synchronous Slave mode
Asynchronous and Synchronous Master
modes
Synchronous Slave mode
the
22-3, respectively, on the following pages.
The EUSART control will automatically
reconfigure the pin from input to output as
needed.
Throughout this section, references to
register and bit names that may be asso-
ciated with a specific EUSART module are
referred to generically by the use of ‘x’ in
place of the specific module number.
Thus, “RCSTAx” might refer to the
Receive
EUSART1 or EUSART2.
functions
RC7/RX1/DT1/SEG28)
Register
Status
of
PORTC
22-1,
register
and RG2/RX2/DT2/
DS39957D-page 349
Register 22-2
(RC6/TX1/CK1/
and
for
PORTG
either
and