MT47H128M8HQ-187E:E Micron Technology Inc, MT47H128M8HQ-187E:E Datasheet - Page 45
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MT47H128M8HQ-187E:E
Manufacturer Part Number
MT47H128M8HQ-187E:E
Description
Manufacturer
Micron Technology Inc
Type
DDR2 SDRAMr
Datasheet
1.MT47H128M8HQ-187EE.pdf
(135 pages)
Specifications of MT47H128M8HQ-187E:E
Organization
128Mx8
Density
1Gb
Address Bus
17b
Access Time (max)
350ps
Maximum Clock Rate
1.066GHz
Operating Supply Voltage (typ)
1.8V
Package Type
FBGA
Operating Temp Range
0C to 85C
Operating Supply Voltage (max)
1.9V
Operating Supply Voltage (min)
1.7V
Supply Current
210mA
Pin Count
60
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MT47H128M8HQ-187E:E TR
Manufacturer:
Micron Technology Inc
Quantity:
10 000
Table 16: Differential Input Logic Levels
All voltages referenced to Vss
Figure 12: Differential Input Signal Levels
PDF: 09005aef821ae8bf
Rev. O 9/08 EN
Parameter
DC input signal voltage
DC differential input voltage
AC differential input voltage
AC differential cross-point voltage
Input midpoint voltage
Notes:
Notes:
VddQ = 1.8V
1. Vin(DC) specifies the allowable DC execution of each input of differential pair such as
2. Vid(DC) specifies the input differential voltage |Vtr - Vcp| required for switching, where
3. Vid(AC) specifies the input differential voltage |Vtr - Vcp| required for switching, where
4. The typical value of Vix(AC) is expected to be about 0.5 × VddQ of the transmitting de-
5. Vmp(DC) specifies the input differential common mode voltage (Vtr + Vcp)/2 where Vtr
6. VddQ + 300mV allowed provided 1.9V is not exceeded.
1. TR and CP may not be more positive than VddQ + 0.3V or more negative than Vss - 0.3V.
2. TR represents the CK, DQS, RDQS, LDQS, and UDQS signals; CP represents CK#, DQS#,
3. This provides a minimum of 850mV to a maximum of 950mV and is expected to be
4. TR and CP must cross in this region.
5. TR and CP must meet at least Vid(DC) MIN when static and is centered around Vmp(DC).
1.075V
0.725V
–0.30V
2.1V
0.9V
CP 2
TR 2
CK, CK#, DQS, DQS#, LDQS, LDQS#, UDQS, UDQS#, and RDQS, RDQS#.
Vtr is the true input (such as CK, DQS, LDQS, UDQS) level and Vcp is the complementary
input (such as CK#, DQS#, LDQS#, UDQS#) level. The minimum value is equal to Vih(DC) -
Vil(DC). Differential input signal levels are shown in Figure 12 (page 45).
Vtr is the true input (such as CK, DQS, LDQS, UDQS, RDQS) level and Vcp is the comple-
mentary input (such as CK#, DQS#, LDQS#, UDQS#, RDQS#) level. The minimum value is
equal to Vih(AC) - Vil(AC), as shown in Table 15 (page 44).
vice and Vix(AC) is expected to track variations in VddQ. Vix(AC) indicates the voltage at
which differential input signals must cross, as shown in Figure 12 (page 45).
is the true input (CK, DQS) level and Vcp is the complementary input (CK#, DQS#).
Vmp(DC) is expected to be approximately 0.5 × VddQ.
RDQS#, LDQS#, and UDQS# signals.
VddQ/2.
Input Electrical Characteristics and Operating Conditions
X
Vmp(DC)
Symbol
Vin(DC)
Vid(DC)
Vid(AC)
Vix(AC)
0.50 × VddQ - 175
45
X
–300
Min
250
500
850
Micron Technology, Inc. reserves the right to change products or specifications without notice.
1Gb: x4, x8, x16 DDR2 SDRAM
0.50 × VddQ + 175
Vin(dc) MAX 1
Vmp(dc) 3
Vin(dc) MIN 1
Vix(ac) 4
VddQ
VddQ
VddQ
Max
950
Vid(dc) 5
© 2004 Micron Technology, Inc. All rights reserved.
Vid(ac) 6
Units
mV
mV
mV
mV
mV
Notes
1, 6
2, 6
3, 6
4
5