MT47H128M8HQ-187E:E Micron Technology Inc, MT47H128M8HQ-187E:E Datasheet - Page 99
![no-image](/images/manufacturer_photos/0/4/441/micron_technology_inc_sml.jpg)
MT47H128M8HQ-187E:E
Manufacturer Part Number
MT47H128M8HQ-187E:E
Description
Manufacturer
Micron Technology Inc
Type
DDR2 SDRAMr
Datasheet
1.MT47H128M8HQ-187EE.pdf
(135 pages)
Specifications of MT47H128M8HQ-187E:E
Organization
128Mx8
Density
1Gb
Address Bus
17b
Access Time (max)
350ps
Maximum Clock Rate
1.066GHz
Operating Supply Voltage (typ)
1.8V
Package Type
FBGA
Operating Temp Range
0C to 85C
Operating Supply Voltage (max)
1.9V
Operating Supply Voltage (min)
1.7V
Supply Current
210mA
Pin Count
60
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MT47H128M8HQ-187E:E TR
Manufacturer:
Micron Technology Inc
Quantity:
10 000
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Figure 49: READ-to-PRECHARGE – BL = 4
Figure 50: READ-to-PRECHARGE – BL = 8
PDF: 09005aef821ae8bf
Rev. O 9/08 EN
Notes:
Notes:
not be issued until
the access of the last data elements.
Examples of READ-to-PRECHARGE for BL = 4 are shown in Figure 49 (page 99) and in
Figure 50 (page 99) for BL = 8. The delay from READ-to-PRECHARGE period to the
same bank is AL + BL/2 - 2CK + MAX (
of the two.
DQS, DQS#
DQS, DQS#
Command
Command
Address
Address
1. RL = 4 (AL = 1, CL = 3); BL = 4.
2.
3. Shown with nominal
1. RL = 4 (AL = 1, CL = 3); BL = 8.
2.
3. Shown with nominal
CK#
A10
DQ
CK#
A10
CK
DQ
CK
t
t
RTP ≥ 2 clocks.
RTP ≥ 2 clocks.
Bank a
Bank a
READ
READ
T0
T0
AL + BL/2 - 2CK + MAX ( t RTP/ t CK or 2CK)
AL = 1
AL = 1
First 4-bit
prefetch
prefetch
NOP
AL + BL/2 - 2CK + MAX ( t RTP/ t CK or 2CK)
4-bit
T1
≥ t RAS (MIN)
NOP
T1
t
RP is met. However, part of the row precharge time is hidden during
≥t RAS (MIN)
≥ t RTP (MIN)
NOP
T2
t
t
AC,
AC,
NOP
CL = 3
T2
Second 4-bit
99
t
t
DQSCK, and
DQSCK, and
CL = 3
prefetch
≥ t RC (MIN)
≥t RC (MIN)
NOP
T3
Bank a
Valid
PRE
T3
≥t RTP (MIN)
t
RTP/
Micron Technology, Inc. reserves the right to change products or specifications without notice.
NOP
T4
t
DO
t
DQSQ.
DQSQ.
NOP
t
T4
CK or 2 × CK) where MAX means the larger
≥ t RP (MIN)
DO
DO
1Gb: x4, x8, x16 DDR2 SDRAM
Bank a
Valid
PRE
T5
DO
DO
NOP
T5
Transitioning Data
Transitioning Data
DO
DO
NOP
T6
≥t RP (MIN)
DO
DO
Bank a
Valid
ACT
T6
DO
© 2004 Micron Technology, Inc. All rights reserved.
NOP
T7
DO
Don’t Care
Don’t Care
DO
NOP
T7
Bank a
Valid
ACT
T8
READ
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