LTC4259CGW Linear Technology, LTC4259CGW Datasheet - Page 14

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LTC4259CGW

Manufacturer Part Number
LTC4259CGW
Description
Manufacturer
Linear Technology
Datasheet

Specifications of LTC4259CGW

Linear Misc Type
Negative Voltage
Operating Supply Voltage (typ)
-48V
Operating Supply Voltage (max)
-57V
Operating Temperature (min)
0C
Operating Temperature (max)
70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
36
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LTC4259CGW
Manufacturer:
LT/凌特
Quantity:
20 000
APPLICATIO S I FOR ATIO
LTC4259
OPERATING MODES
Each LTC4259 port can operate in one of four modes:
Manual, Semiauto, Auto or Shutdown. The operating
mode for a port is set by the appropriate bits in the
Operating Mode register. The LTC4259 will power up with
all ports in Shutdown mode if the external AUTO pin is tied
low; if AUTO is high, all ports will wake up in Auto mode.
The operating mode can be changed at any time via the I
interface, regardless of the state of the AUTO pin.
• In Manual mode, a port will wait for instructions from
• In Semiauto mode, the port will continuously attempt to
• In Auto mode, the port will detect and classify a PD
• In Shutdown mode, the port is disabled and will not
Regardless of which mode it is in, the LTC4259 will
remove power automatically from any port that generates
a t
and t
remove power from any port that generates a disconnect
event if the appropriate Disconnect Enable bit is set in the
Disconnect Enable register. The host controller may also
remove power at any time by setting the appropriate
Power Off bit in the Power Enable PB register.
14
START
the host system before taking any action. It will run
single detection or classification cycles when com-
manded, and will report results in the Port Status
registers. When the host system decides it is time to
turn on or off power to a port, it can do so by setting
the appropriate Power On/Off bits in the Power Enable
PB register regardless of the current status of detec-
tion or classification.
detect and classify a PD device attached to the link. It
will report this information in its Port Status register,
and wait for the host system to set the appropriate
Power On bit in the Power Enable PB register before
applying power to the port.
device connected to it, then immediately turn on the
power if detection was successful regardless of the
result of classification.
detect or power a PD. Also, the detect and fault event
bits, status bits and enable bits for the port are reset to
zero.
START
or t
ICUT
Timing sections). It will also automatically
overcurrent fault event (see t
U
U
W
ICUT
U
Timing
2
C
Power-On RESET
At turn-on or any time the LTC4259 is reset (either by
pulling the RESET pin low or writing to the global Reset All
bit), all the ports turn off and all internal registers go to a
predefined state, shown in Table 1.
Several of the registers assume different states based on
the state of the AUTO pin at reset. The default states with
AUTO high allow the LTC4259 to detect and power up a PD
in Automatic mode, even if nothing is connected to the I
interface.
SIGNATURE DETECTION
The IEEE defines a specific pair-to-pair PD signature
resistance that identifies a device that can accept Power
over Ethernet in accordance with the 802.3af specifica-
tion. When the channel voltage is below 10V, an 802.3af
compliant PD will have a 25k signature resistance. Figure
12 illustrates the relationship between the PD signature
resistance (white box from 23.75k to 26.25k) and required
resistance ranges the PSE must accept (white box) and
reject (gray boxes). According to the 802.3af specifica-
tion, the PSE may or may not accept resistances in the two
ranges of 15k to 19k and 26.5k to 33k. Note that the black
box in Figure 12 represents the 150 pair-to-pair termina-
tion used in legacy 802.3 devices like a computer’s net-
work interface card (NIC) that cannot accept power.
The LTC4259 checks for the signature resistance by
forcing two test currents on the wire in sequence and
measuring the resulting voltages. It then subtracts the two
V-I points to determine the resistive slope while removing
voltage offset caused by any series diodes or current
offset caused by leakage at the port (see Figure 13). The
LTC4259 will typically accept any PD resistance between
RESISTANCE
PD/NIC
Figure 12. IEEE 802.3af Signature Resistance Ranges
PSE
0
150
10k
15k
20k
19k
23.75k
26.25k
26.5k
30k
33k
4259 G12
4259i
2
C

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