LTC4259CGW Linear Technology, LTC4259CGW Datasheet - Page 16

• Manufacturer Part Number: LTC4259CGW
• Manufacturer: Linear Technology

Specifications of LTC4259CGW

• Linear Misc Type: Negative Voltage
• Operating Supply Voltage (typ): -48V
• Operating Supply Voltage (max): -57V
• Operating Temperature (min): 0C
• Operating Temperature (max): 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 36
• Lead Free Status / Rohs Status: Not Compliant

APPLICATIO S I FOR ATIO
LTC4259
The LTC4259 will classify a port immediately after a
successful detection cycle in Semiauto or Auto modes, or
when commanded in Manual mode. It measures the PD
classification signature current by applying 18V (typ) to
the port and measuring the resulting current. It reports the
detected class in the Class Status bits in the correspond-
ing Port Status register. Note that in Auto mode, the port
will power up regardless of which class is detected.
The classification circuitry is disabled when the port is in
Shutdown mode, powered up, or the corresponding Class
Enable bit is cleared.
POWER CONTROL
The primary function of the LTC4259 is to control the
delivery of power to the PSE port. It does this by control-
ling the gate drive voltage of an external power MOSFET
while monitoring the current via a sense resistor and the
output voltage at the OUT pin. This circuitry serves to
couple the raw isolated –48V input supply to the port in a
controlled manner that satisfies the PD’s power needs
while minimizing disturbances on the –48V backplane.
Gate Currents
Once the decision has been made to turn on the power to
a port, the LTC4259 uses a 50 A current source to pull up
on the GATE pin. Under normal power-up circumstances,
16
60
50
40
30
20
10
0
0
Figure 14. PD Classification
5
U
TYPICAL
CLASS 3
VOLTAGE (V
10
U
PD
CURRENT
CLASS 4
CLASS 3
OVER
CLASS 2
CLASS 1
CLASS 0
CLASS
15
)
W
48mA
33mA
23mA
20
14.5mA
6.5mA
4259 F14
25
U
the MOSFET gate will charge up quickly to V
threshold voltage), the MOSFET current will rise quickly to
the current limit level and the GATE pin will be servoed to
maintain the proper I
put charging is complete, the MOSFET current will fall and
the GATE pin will be allowed to continue rising to fully
enhance the MOSFET and minimize its on resistance. The
final V
50 A current source pulls down on the GATE pin, turning
the MOSFET off in a controlled manner.
No External Capacitors
No external capacitors are required on the GATE pins for
active current limit stability, lowering part count and cost.
This also allows the fastest possible turn-off under severe
overcurrent conditions, providing maximum safety and
protection for the MOSFETs, load devices and board traces.
Connecting capacitors to the external MOSFET gates will
adversely affect the LTC4259’s ability to respond to a
shorted port.
Inrush Control
When the LTC4259 turns on a port, it turns on the MOSFET
by pulling up on the gate. The LTC4259 is designed to
power up the port in current limit, limiting the inrush
current to I
The port voltage will quickly rise to the point where the PD
reaches its input turn-on threshold and begins to draw
current to charge its bypass capacitance, slowing the rate
of port voltage increase.
The 802.3af specification lists two separate maximum
current limits, I
tical values, the LTC4259 implements both as a single
current limit using V
tions are differentiated through the use of t
respectively (see t
tions). To maintain consistency with the specification, the
I
power-up event.
INRUSH
GS
term is used when referring to an initial t
is nominally 13V. When a port is turned off, a
INRUSH
LIM
.
ICUT
and I
INRUSH
LIM
Timing and t
INRUSH
(described below). Their func-
charging current. When out-
. Because they have iden-
START
ICUT
T
(the MOSFET
Timing sec-
and t
START
START
4259i
,