SCD240110QCM Intel, SCD240110QCM Datasheet - Page 85
SCD240110QCM
Manufacturer Part Number
SCD240110QCM
Description
Manufacturer
Intel
Datasheet
1.SCD240110QCM.pdf
(176 pages)
Specifications of SCD240110QCM
Operating Supply Voltage (max)
7V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
100
Lead Free Status / Rohs Status
Not Compliant
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6.6
6.6.1
Datasheet
Note: The CD2401 passes all data received to the host before it receives SYN characters.
Note: A SYN character detect interrupt is generated after the second SYN. A special character detect
The SCDE bit enables the detection of the special characters defined in SCHR1–3 the same way as
steady-state conditions. When detected for two consecutive character times, a special character
detect interrupt is generated and the next repetitions of the same character are stripped from the
receive data (for example, to detect the ‘BEL off’ condition for a DTE incoming call, then strip that
repetition until the next state change). Character synchronization must be achieved before SCHR1–
3 can be detected.
In certain phases of X.21 call setup, there is no character synchronization. When a data change
occurs in a non-character synchronous phase, a partial character can be detected before the steady
is detected or character sync is achieved. In these conditions, the partial character is passed to the
host as normal data.
Example
Assume the SSDE, StrpSYN, and SCDE bits are set, that is the CD2401 detects steady-state
conditions, strip SYN characters, and special characters from the incoming data. Under these
conditions, the following data stream:
Incoming data:
Where SS = steady-state condition.
interrupt is generated after the second Bell.
Incoming data is passed to host as:
Extended X.21 Mode
Proper selection of options can extend the X.21 mode for some synchronous applications.
Extended X.21 mode does not perform a true programmable sync mode, because the Extended-
X.21 mode keeps passing characters to host though it is in SYN Hunt mode.
Extended X.21 Transmit
Without the ETC bit (COR2[5]) enabled, data supplied to the channel is transmitted unaltered.
When no data is available in the transmit FIFO, the ASCII SYN character (16) is sent to fill idle
time; the normal operating mode in X.21. If a different character is required, two methods are
available.
Junk Data Data
SS SS Junk SS SS SYN SYN Bell Bell Data Data SS SS
Multi-Protocol Communications Controller — CD2401
85
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