SCD240110QCM Intel, SCD240110QCM Datasheet - Page 97

• Manufacturer Part Number: SCD240110QCM
• Manufacturer: Intel

Specifications of SCD240110QCM

• Operating Supply Voltage (max): 7V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 100
• Lead Free Status / Rohs Status: Not Compliant

Datasheet
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Implied XON Mode
IXM has meaning only if TxIBE is set.
If transmission stops due to a received XOFF character, then:
0 = transmission resumes only after the receipt of an XON character or a transmit
enable command by the CCR.
1 = transmission resumes after the receipt of any character or a transmit enable com-
mand by the CCR.
Transmit In-band flow control Enable
0 = no in-band flow control.
1 = transmission stops after the receipt of an XOFF character (cntl-S or 13 hex).
Immediately after receiving an XOFF, any character in the Transmit Shift or Holding
registers are transmitted and character transmission halts. Thus, no more than two
characters are sent after receiving an XOFF.
Depending on the state of the IXM bit, either the receipt of an XON (cntl-Q or 11
hex) character or any character (IXM = 1) restarts the transmission. A transmit
enable command by the CCR also restarts transmission.
Embedded Transmitter Command enable (Async)
When this bit is set, the embedded special transmitter command functions are
enabled. The NULL (all zeros) character is used as the ESCape character. The fol-
lowing functions are supported:
00H 00H = send one 00H character as normal data
00H 81H = Send BREAK
Enter line break condition for at least one character time. (If the insert delay special
character sequence immediately follows the Send BREAK sequence, the duration of
the break transmission is extended by the amount of the programmed delay.)
00H 82H XXH = insert delay
Insert a delay of ‘XX’ (interpreted as an unsigned binary number) times the pro-
grammed timer ‘tick’ set by the Prescaler Period registers. (A zero delay count
results in no delay.)
00H 83H = stop BREAK
Exit line break condition and resume normal character transmission.
Reserved – must be ‘0’.
Remote Loopback Mode
1 = enables Remote Loopback mode.
0 = disables Remote Loopback mode.
RTS* Automatic Output enable
1 = the RTS* output pin remains enabled during DMA or character bursts from the
transmit FIFO. If the CTS* input pin goes high, then RTS* goes high and transmis-
sion stops after the current burst is complete.
CTS* Automatic Enable
0 = the transmitter output enable is independent of the CTS* input pin.
Multi-Protocol Communications Controller — CD2401
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