TC59LM818DMBI-37 Toshiba, TC59LM818DMBI-37 Datasheet - Page 37

• Manufacturer Part Number: TC59LM818DMBI-37
• Manufacturer: Toshiba
• Type: DDR FCRAMr

Specifications of TC59LM818DMBI-37

• Organization: 16Mx18
• Density: 288Mb
• Address Bus: 17b
• Access Time (max): 650ps
• Maximum Clock Rate: 533MHz
• Operating Supply Voltage (typ): 2.5V
• Package Type: BGA
• Operating Temp Range: -40C to 100C
• Operating Supply Voltage (max): 2.625V
• Operating Supply Voltage (min): 2.375V
• Supply Current: 420mA
• Pin Count: 60
• Mounting: Surface Mount
• Operating Temperature Classification: Industrial
• Lead Free Status / Rohs Status: Not Compliant

Unidirectional DS/QS mode
Unidirectional DS/Free Running QS mode
Bank Add.
CL = 4
CL = 5
CL = 6
CL = 4
CL = 5
CL = 6
Command
MULTIPLE BANK READ-WRITE TIMING (BL = 2)
Address
(output)
(output)
(output)
(output)
(output)
(output)
(input)
(input)
(input)
(input)
(input)
(input)
CLK
CLK
DQ
DQ
DQ
DQ
DQ
DQ
QS
QS
QS
QS
QS
QS
DS
DS
DS
DS
DS
DS
Note: l
WRA
Bank
UA
"a"
0
RC
I
RBD
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Low
Low
Low
to the same bank must be satisfied.
I
WRD
= 2 cycles
LAL
LA
1
= 1 cycle
WL = 3
WL = 3
WL = 4
WL = 4
WL = 5
WL = 5
Bank
RDA
UA
"b"
2
LAL
LA
3
I
RWD
DESL
Da0 Da1
Da0 Da1
= 2 cycles
I
4
RC
(Bank"a")
WRA
Bank
CL = 4
CL = 5
UA
CL = 4
"c"
Da0 Da1
Da0 Da1
5
CL = 5
CL = 6
I
WRD
CL = 6
LAL
LA
Da0 Da1
Da0 Da1
6
I
RC
= 1 cycle
(Bank"b")
Bank
RDA
UA
"d"
7
Qb0 Qb1
Qb0 Qb1
LAL
LA
8
Qb0 Qb1
Qb0 Qb1
I
RWD
DESL
Dc0 Dc1
Dc0 Dc1
= 2 cycles
9
Qb0 Qb1
Qb0 Qb1
WRA
Bank
UA
Dc0 Dc1
Dc0 Dc1
"a"
10
TC59LM818DMBI-37
LAL
Dc0 Dc1
Dc0 Dc1
11
LA
Bank
RDA
UA
2005-03-07 37/55
"b"
12
Qd0 Qd1
Qd0 Qd1
LAL
13
LA
Qd0 Qd1
Qd0 Qd1
DESL
Da0 Da1
Da0 Da1
14
Rev 1.2
Qd0 Qd1
Qd0 Qd1
WRA
Bank
UA
15
"c"
Da0 Da1
Da0 Da1