GS8662Q18GE-250 GSI TECHNOLOGY, GS8662Q18GE-250 Datasheet - Page 14

• Manufacturer Part Number: GS8662Q18GE-250
• Manufacturer: GSI TECHNOLOGY

Separate I/O SigmaQuad-II B2 SigmaQuad-II SRAM Read Truth Table
Separate I/O SigmaQuad-II B2 SigmaQuad-II SRAM Write Truth Table
Rev: 1.08 12/2007
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Notes:
1.
2.
3.
4.
Notes:
1.
2.
3.
(t
K ↑
n + ½
K
(t
X = Don’t Care, H = High, L = Low, V = Valid.
W is evaluated on the rising edge of K.
D0 and D1 are the first and second data input transfers in a write.
BWn represents any of the Byte Write Enable inputs (BW0, BW1, etc.).
A
V
V
V
X
X
A
X
V
n
X = Don’t Care, 1 = High, 0 = Low, V = Valid.
R is evaluated on the rising edge of K.
Q0 and Q1 are the first and second data output transfers in a read.
↑
)
)
K ↑
(t
W
K
0
0
0
0
1
(t
n
R
1
0
)
n
↑
)
BWn
K ↑
(t
0
0
1
1
X
n
)
(t
BWn
K ↑
n + ½
0
1
0
1
X
)
Output Next State
Write Abort Byte Dx0, Write Abort Byte Dx1
Deselect
Write Byte Dx0, Write Abort Byte Dx1
Write Abort Byte Dx0, Write Byte Dx1
Read
K
(t
14/35
Write Byte Dx0, Write Byte Dx1
n
↑
)
Input Next State
(t
K ↑, K ↑
n
Deselect
), (t
n + ½
)
GS8662Q08/09/18/36E-278/250/200/167
(t
Hi-Z
K
Q0
n+1
Q
K ↑
(t
↑
D0
D0
D
X
X
X
)
n
)
© 2005, GSI Technology
(t
(t
Hi-Z
n+1½
K
Q1
K ↑
n + ½
Q
D1
D1
D
X
X
X
↑
)
)