MT46H8M32LFB5-6IT:H Micron Technology Inc, MT46H8M32LFB5-6IT:H Datasheet - Page 92
MT46H8M32LFB5-6IT:H
Manufacturer Part Number
MT46H8M32LFB5-6IT:H
Description
MICMT46H8M32LFB5-6_IT:H MDDDR
Manufacturer
Micron Technology Inc
Datasheet
1.MT46H8M32LFB5-6ITH.pdf
(96 pages)
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Figure 52: Deep Power-Down Mode
PDF: 09005aef834bf85b
256mb_mobile_ddr_sdram_t36n.pdf - Rev. I 09/10 EN
Command
CKE
CK#
CK
All banks idle with no
activity on the data bus
1
Notes:
NOP
T0
1. Clock must be stable prior to CKE going HIGH.
2. DPD = deep power-down.
3. Upon exit of deep power-down mode, a full DRAM initialization sequence is required.
t
IS
DPD
T1
Enter deep power-down mode
2
T2
(
(
(
)
(
)
(
t
)
)
)
(
CKE
(
(
(
)
(
)
)
)
)
92
256Mb: x16, x32 Mobile LPDDR SDRAM
Ta0
1
Micron Technology, Inc. reserves the right to change products or specifications without notice.
NOP
Ta1
Exit deep power-down mode
T = 200µs
© 2008 Micron Technology, Inc. All rights reserved.
Ta2
NOP
Power-Down
Don’t Care
Ta3
PRE
3
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