EP3C55F484I7 Altera, EP3C55F484I7 Datasheet - Page 41

• Manufacturer Part Number: EP3C55F484I7
• Description: IC CYCLONE III FPGA 55K 484 FBGA
• Manufacturer: Altera
• Series: Cyclone® IIIr

Specifications of EP3C55F484I7

• Number Of Logic Elements/cells: 55856
• Number Of Labs/clbs: 3491
• Total Ram Bits: 2396160
• Number Of I /o: 327
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 484-FBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -

Chapter 1: Cyclone III Device Data Sheet
Glossary
Table 1–39. Glossary (Part 5 of 5)
© January 2010 Altera Corporation
Letter
W
V
X
Y
Z
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
C M( DC)
DIF( AC )
DIF( DC)
IC M
ID
IH
IH(A C)
IH(DC )
IL
IL ( AC )
IL ( DC)
IN
OC M
OD
OH
OL
OS
OX ( AC)
REF
REF (A C)
REF (DC )
S WING (A C)
S WING (DC )
TT
X ( AC)
Term
—
—
—
—
DC Common Mode Input Voltage.
AC differential Input Voltage: The minimum AC input differential voltage required for switching.
DC differential Input Voltage: The minimum DC input differential voltage required for switching.
Input Common Mode Voltage: The common mode of the differential signal at the receiver.
Input differential Voltage Swing: The difference in voltage between the positive and
complementary conductors of a differential transmission at the receiver.
Voltage Input High: The minimum positive voltage applied to the input which is accepted by the
device as a logic high.
High-level AC input voltage.
High-level DC input voltage.
Voltage Input Low: The maximum positive voltage applied to the input which is accepted by the
device as a logic low.
Low-level AC input voltage.
Low-level DC input voltage.
DC input voltage.
Output Common Mode Voltage: The common mode of the differential signal at the transmitter.
Output differential Voltage Swing: The difference in voltage between the positive and
complementary conductors of a differential transmission at the transmitter. V
Voltage Output High: The maximum positive voltage from an output which the device considers is
accepted as the minimum positive high level.
Voltage Output Low: The maximum positive voltage from an output which the device considers is
accepted as the maximum positive low level.
Output offset voltage: V
AC differential Output cross point voltage: The voltage at which the differential output signals must
cross.
Reference voltage for SSTL, HSTL I/O Standards.
AC input reference voltage for SSTL, HSTL I/O Standards. V
peak-to-peak AC noise on V
DC input reference voltage for SSTL, HSTL I/O Standards.
AC differential Input Voltage: AC Input differential voltage required for switching. For the SSTL
Differential I/O Standard, refer to Input Waveforms.
DC differential Input Voltage: DC Input differential voltage required for switching. For the SSTL
Differential I/O Standard, refer to Input Waveforms.
Termination voltage for SSTL, HSTL I/O Standards.
AC differential Input cross point Voltage: The voltage at which the differential input signals must
cross.
OS
= (V
REF
OH
should not exceed 2% of V
+ V
OL
) / 2.
Definitions
—
—
—
—
REF (DC)
REF (AC )
.
Cyclone III Device Handbook, Volume 2
= V
REF (DC)
+ noise. The
OD
= V
OH
– V
OL
.
1–31