EP3C120F484I7 Altera, EP3C120F484I7 Datasheet - Page 166

• Manufacturer Part Number: EP3C120F484I7
• Description: IC CYCLONE III FPGA 120K 484FBGA
• Manufacturer: Altera
• Series: Cyclone® IIIr

Specifications of EP3C120F484I7

• Number Of Logic Elements/cells: 119088
• Number Of Labs/clbs: 7443
• Total Ram Bits: 3981312
• Number Of I /o: 283
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 484-FBGA
• Family Name: Cyclone III
• Number Of Logic Blocks/elements: 119088
• # I/os (max): 283
• Frequency (max): 437.5MHz
• Process Technology: 65nm
• Operating Supply Voltage (typ): 1.2V
• Logic Cells: 119088
• Ram Bits: 3981312
• Operating Supply Voltage (min): 1.15V
• Operating Supply Voltage (max): 1.25V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 484
• Package Type: FBGA
• For Use With: 544-2589 - KIT DEV EMB CYCLONE III EDITION544-2566 - KIT DEV DSP CYCLONE III EDITION544-2444 - KIT DEV CYCLONE III EP3C120
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Not Compliant

9–6
Table 9–2. Cyclone III Device Family Supported POR Times Across Configuration Schemes
Cyclone III Device Handbook, Volume 1
Active Parallel ×16 Standard (AP Standard POR, for
Cyclone III devices only)
Active Parallel ×16 Standard (AP Standard POR, for
Cyclone III devices only)
Active Parallel ×16 Standard (AP Standard POR, for
Cyclone III devices only)
Active Parallel ×16 Fast (AP Fast POR, for
Cyclone III devices only)
Active Parallel ×16 Fast (AP Fast POR, for
Cyclone III devices only)
Passive Serial Standard (PS Standard POR)
Passive Serial Fast (PS Fast POR)
Fast Passive Parallel Fast (FPP Fast POR)
Fast Passive Parallel Fast (FPP Fast POR)
JTAG-based configuration
Notes to
(1) Altera recommends connecting the MSEL pins to V
(2) The configuration voltage standard is applied to the V
(3) JTAG-based configuration takes precedence over other configuration schemes, which means the MSEL pin settings are ignored. However, the
POR time is dependent on the MSEL pin settings.
Table
f
9–2:
Configuration Scheme
1
In some applications, it is necessary for a device to wake up very quickly to begin
operation. The Cyclone III device family offers the fast POR time option to support
fast wake-up time applications. The fast POR time option has stricter power-up
requirements when compared with the standard POR time option. You can select
either the fast POR or standard POR options with the MSEL pin settings.
The automotive application is for Cyclone III devices only. The Cyclone III devices
fast wake-up time meets the requirement of common bus standards in automotive
applications, such as Media Orientated Systems Transport (MOST) and Controller
Area Network (CAN).
For more information about wake-up time and the POR circuit, refer to the
Hot-Socketing and Power-On Reset in Cyclone III Devices
Chapter 9: Configuration, Design Security, and Remote System Upgrades in the Cyclone III Device Family
CCA
C CIO
or GND depending on the MSEL pin settings.
supply of the bank in which the configuration pins reside.
(3 ms< TPOR < 9 ms)
Fast POR Time
(3)
v
v
v
v
v
—
—
—
—
(50 ms< TPOR < 200 ms)
Standard POR Time
chapter.
(3)
v
v
v
v
—
—
—
—
—
© December 2009 Altera Corporation
(Note 1)
(Part 2 of 2)
Configuration Features
Standard
Configuration
3.3/3.0/2.5
3.3/3.0/2.5
3.3/3.0/2.5
Voltage
3.0/2.5
1.8/1.5
3.3
1.8
3.3
1.8
—
(V)(2)