EP2AGX190FF35C6N Altera, EP2AGX190FF35C6N Datasheet - Page 248
![no-image](/images/manufacturer_photos/0/0/40/altera_sml.jpg)
EP2AGX190FF35C6N
Manufacturer Part Number
EP2AGX190FF35C6N
Description
IC ARRIA II GX 190K 1152FBGA
Manufacturer
Altera
Series
Arria II GXr
Datasheets
1.EP2AGX45CU17C6N.pdf
(96 pages)
2.EP2AGX45CU17C6N.pdf
(14 pages)
3.EP2AGX45CU17C6N.pdf
(692 pages)
4.EP2AGX45CU17C6N.pdf
(10 pages)
5.EP2AGX45CU17C6N.pdf
(88 pages)
6.EP2AGX190FF35C6N.pdf
(306 pages)
Specifications of EP2AGX190FF35C6N
Number Of Logic Elements/cells
181165
Number Of Labs/clbs
7612
Total Ram Bits
9939
Number Of I /o
612
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1152-FBGA
Family Name
Arria® II GX
Number Of Logic Blocks/elements
190300
# I/os (max)
612
Frequency (max)
400MHz
Operating Supply Voltage (typ)
900mV
Logic Cells
190300
Ram Bits
10380902.4
Operating Supply Voltage (min)
0.87V
Operating Supply Voltage (max)
0.93V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
1152
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
- EP2AGX45CU17C6N PDF datasheet
- EP2AGX45CU17C6N PDF datasheet #2
- EP2AGX45CU17C6N PDF datasheet #3
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- EP2AGX45CU17C6N PDF datasheet #5
- EP2AGX190FF35C6N PDF datasheet #6
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9–28
Figure 9–15. Multi-Device PS Configuration Using a USB-Blaster, ByteBlaster II, ByteBlasterMV, or EthernetBlaster Cable
Notes to
(1) Connect the pull-up resistor to the same supply voltage (V
(2) You only need the pull-up resistors on DATA0 and DCLK if the download cable is the only configuration scheme used on your board. This ensures
(3) In the ByteBlasterMV cable, pin 6 is a no connect. In the USB-Blaster and ByteBlaster II cables, this pin is connected to nCE when it is used for
(4) The MSEL pin settings vary for different configuration voltage standards and POR delays. To connect MSEL[3..0], refer to
Arria II GX Device Handbook, Volume 1
that DATA0 and DCLK are not left floating after configuration. For example, if you are also using a configuration device, you do not need the
pull-up resistors on DATA0 and DCLK.
AS programming; otherwise, it is a no connect.
page
Figure
9–7.
f
9–15:
10
V
CCIO
kΩ
10
(1)
V
Figure 9–15
cable.
kΩ
For more information about how to use the USB-Blaster, ByteBlaster II,
ByteBlasterMV, or EthernetBlaster cables, refer to the following user guides:
■
■
■
■
CCIO
USB-Blaster Download Cable User Guide
ByteBlaster II Download Cable User Guide
ByteBlasterMV Download Cable User Guide
Ethernet Blaster Communications Cable User Guide
(1)
(2)
10
GND
V
kΩ
CCIO
(4)
(4)
shows how to configure multiple Arria II GX devices with a download
(1)
Arria II GX Device 1
Arria II GX Device 2
Chapter 9: Configuration, Design Security, and Remote System Upgrades in Arria II GX Devices
DATA0
nCONFIG
nCONFIG
MSEL[3..0]
nCE
MSEL[3..0]
nCE
DATA0
CONF_DONE
CONF_DONE
nSTATUS
nSTATUS
CCIO
DCLK
nCEO
DCLK
nCEO
) as the USB-Blaster, ByteBlaster II, ByteBlasterMV, or EthernetBlaster cable.
10
N.C.
V
kΩ
CCIO
10
(1)
kΩ
V
CCIO
(1)
10
V
kΩ
CCIO
(2)
(1)
10-Pin Male Header
Pin 1
Download Cable
(PS Mode)
© July 2010 Altera Corporation
GND
V
Passive Serial Configuration
CCIO
V
GND
IO
(1)
(3)
Table 9–2 on
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