EP1S40B956C5 Altera, EP1S40B956C5 Datasheet - Page 338
![IC STRATIX FPGA 40K LE 956-BGA](/photos/6/73/67334/544-stratix_956-bga_sml.jpg)
EP1S40B956C5
Manufacturer Part Number
EP1S40B956C5
Description
IC STRATIX FPGA 40K LE 956-BGA
Manufacturer
Altera
Series
Stratix®r
Datasheet
1.EP1S10F484I6N.pdf
(864 pages)
Specifications of EP1S40B956C5
Number Of Logic Elements/cells
41250
Number Of Labs/clbs
4125
Total Ram Bits
3423744
Number Of I /o
683
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
956-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP1S40B956C5
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
- Current page: 338 of 864
- Download datasheet (11Mb)
Enhanced PLLs
Figure 1–15. Spread-Spectrum Circuit Block Diagram
1–28
Stratix Device Handbook, Volume 2
refclk
Spectrum
Counter
Spread
Figure 1–16
different counter values. Since the enhanced PLL switches between two
different m and n values, the result is a straight line between two
frequencies, which gives a linear modulation. The magnitude of
modulation is determined by the ratio of two m/n sets. The percent
spread is determined by:
percent spread = (f
The maximum and minimum VCO frequency is defined as:
f
f
VCOmax
VCOmin
= (m
= (m
2
1
shows a VCO frequency waveform when toggling between
/n
n count1
/n
2
1
)
)
VCOmax
f
f
ref
ref
÷ n
f
VCOmin
)/f
n count2
VCOmax
m count1
= 1 [(m
2
PFD
÷ m
n
Altera Corporation
1
)/(m
m count2
1
July 2005
n
2
)]
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