EP1S40B956C5 Altera, EP1S40B956C5 Datasheet - Page 343
EP1S40B956C5
Manufacturer Part Number
EP1S40B956C5
Description
IC STRATIX FPGA 40K LE 956-BGA
Manufacturer
Altera
Series
Stratix®r
Datasheet
1.EP1S10F484I6N.pdf
(864 pages)
Specifications of EP1S40B956C5
Number Of Logic Elements/cells
41250
Number Of Labs/clbs
4125
Total Ram Bits
3423744
Number Of I /o
683
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
956-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP1S40B956C5
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
- Current page: 343 of 864
- Download datasheet (11Mb)
Altera Corporation
July 2005
inclk1
pllena
areset
pfdena
clk[2..0]
locked
Table 1–10. Fast PLL Input Signals
Table 1–11. Fast PLL Output Signals
Name
Name
Reference clock input to PLL
Enable pin for enabling or disabling all or a set of
PLLs – active high
Signal used to reset the PLL which re-
synchronizes all the counter outputs active high
Enables the up/down outputs from the phase-
frequency detector active high
PLL outputs driving regional or global clock
Lock output from lock detect circuit active high
Figure 1–18
Figure 1–18. Fast PLL Ports & Physical Destinations
Notes to
(1)
(2)
Tables 1–10
This input pin is shared by all enhanced and fast PLLs.
This input pin is either single-ended or differential.
Figure
Description
Description
(1)
(2)
Physical Pin
Signal Driven by Internal Logic
Signal Driven to Internal Logic
Internal Clock Signal
and
shows all possible ports related to fast PLLs.
1–18:
1–11
General-Purpose PLLs in Stratix & Stratix GX Devices
show the description of all fast PLL ports.
pllena
inclk0
areset
pfdena
Fast PLL Signals
Pin
Pin
Logic array
Logic array
Stratix Device Handbook, Volume 2
PLL counter
PLL lock
detect
Source
Source
PFD
PLL control signal
PLL control signal
PFD
clk[2..0]
locked
Internal clock
Logic array
Destination
Destination
1–33
Related parts for EP1S40B956C5
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
Part Number:
Description:
CYCLONE II STARTER KIT EP2C20N
Manufacturer:
Altera
Datasheet:
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 35 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 15 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 30 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
High-performance, low-power erasable programmable logic devices with 8 macrocells, 10ns
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
High-performance, low-power erasable programmable logic devices with 8 macrocells, 7ns
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
Classic EPLD
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
High-performance, low-power erasable programmable logic devices with 8 macrocells, 10ns
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 25 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet: