EP2SGX90EF1152C5ES Altera, EP2SGX90EF1152C5ES Datasheet - Page 298
EP2SGX90EF1152C5ES
Manufacturer Part Number
EP2SGX90EF1152C5ES
Description
IC STRATIX II GX 90K 1152-FBGA
Manufacturer
Altera
Series
Stratix® II GXr
Datasheet
1.EP2SGX30DF780C5.pdf
(316 pages)
Specifications of EP2SGX90EF1152C5ES
Number Of Logic Elements/cells
90960
Number Of Labs/clbs
4548
Total Ram Bits
4520448
Number Of I /o
558
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 70°C
Package / Case
1152-FBGA
For Use With
544-1725 - PCIE KIT W/S II GX EP2SGX90N544-1724 - SI KIT W/SII GX EP2SGX90N544-1702 - VIDEO KIT W/SII GX EP2SGX90N
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Other names
544-1765
Available stocks
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Manufacturer
Quantity
Price
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(1)
(2)
(3)
(4)
f
f
f
TCCS
SW
Output jitter
Output t
Output t
t
DPA run length
DPA jitter tolerance
DPA lock time
I N
H S D R
H S D R D PA
DUTY
Table 4–108. High-Speed I/O Specifications for -4 Speed Grade
= f
When J = 4 to 10, the SERDES block is used.
When J = 1 or 2, the SERDES block is bypassed.
The input clock frequency and the W factor must satisfy the following fast PLL VCO specification: 150 ≤ input clock
frequency × W ≤ 1,040.
The minimum specification is dependent on the clock source (fast PLL, enhanced PLL, clock pin, and so on) and
the clock routing resource (global, regional, or local) utilized. The I/O differential buffer and input register do not
have a minimum toggle rate.
H S D R
(data rate)
R I S E
FA L L
Symbol
(DPA data rate) J = 4 to 10 (LVDS, HyperTransport technology)
/ W
W = 2 to 32 (LVDS, HyperTransport technology)
(3)
W = 1 (SERDES bypass, LVDS only)
W = 1 (SERDES used, LVDS only)
J = 4 to 10 (LVDS, HyperTransport technology)
J = 2 (LVDS, HyperTransport technology)
J = 1 (LVDS only)
All differential standards
All differential standards
All differential I/O standards
All differential I/O standards
Data channel peak-to-peak jitter
Parallel Rapid I/O
Table 4–108
grade Stratix II GX devices.
Miscellaneous
SPI-4
shows the high-speed I/O timing specifications for -4 speed
Conditions
0000000000
1111111111
00001111
10010000
10101010
01010101
100%
10%
25%
50%
Notes
0.44
Min
150
150
150
330
256
256
256
256
256
(1),
16
(4)
(4)
16
45
-4 Speed Grade
-
(2)
Typ
50
1,040
1,040
6,400
Max
520
500
717
760
500
200
190
160
180
55
-
Number of
repetitions
Mbps
Mbps
Mbps
Mbps
MHz
MHz
MHz
Unit
ps
ps
ps
ps
ps
UI
UI
%
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