EP2SGX90EF1152C5ES Altera, EP2SGX90EF1152C5ES Datasheet - Page 77
EP2SGX90EF1152C5ES
Manufacturer Part Number
EP2SGX90EF1152C5ES
Description
IC STRATIX II GX 90K 1152-FBGA
Manufacturer
Altera
Series
Stratix® II GXr
Datasheet
1.EP2SGX30DF780C5.pdf
(316 pages)
Specifications of EP2SGX90EF1152C5ES
Number Of Logic Elements/cells
90960
Number Of Labs/clbs
4548
Total Ram Bits
4520448
Number Of I /o
558
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 70°C
Package / Case
1152-FBGA
For Use With
544-1725 - PCIE KIT W/S II GX EP2SGX90N544-1724 - SI KIT W/SII GX EP2SGX90N544-1702 - VIDEO KIT W/SII GX EP2SGX90N
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Other names
544-1765
Available stocks
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Manufacturer
Quantity
Price
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TriMatrix
Memory
Altera Corporation
October 2007
Column IOE
Row IOE
Maximum performance
True dual-port memory
Simple dual-port memory
Single-port memory
Shift register
ROM
FIFO buffer
Pack mode
Byte enable
Address clock enable
Parity bits
Mixed clock mode
Memory initialization (.mif)
Table 2–18. Stratix II GX Device Routing Scheme (Part 2 of 2)
Table 2–19. TriMatrix Memory Features (Part 1 of 2)
Memory Feature
Source
TriMatrix memory consists of three types of RAM blocks: M512, M4K,
and M-RAM. Although these memory blocks are different, they can all
implement various types of memory with or without parity, including
true dual-port, simple dual-port, and single-port RAM, ROM, and FIFO
buffers.
blocks.
M512 RAM Block
(32 × 18 Bits)
500 MHz
Table 2–19
v
v
v
v
v
v
v
v
v
v
v v v v
shows the size and features of the different RAM
M4K RAM Block
(128 × 36 Bits)
Destination
550 MHz
v v
Stratix II GX Device Handbook, Volume 1
v
v
v
v
v
v
v
v
v
v
v
v
Stratix II GX Architecture
(4K × 144 Bits)
M-RAM Block
420 MHz
v
v
v
v
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v
v
v
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(1)
2–69
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