XCS30XL-4VQ100I Xilinx Inc, XCS30XL-4VQ100I Datasheet - Page 54

• Manufacturer Part Number: XCS30XL-4VQ100I
• Description: IC FPGA 3.3V I-TEMP HP 100VQFP
• Manufacturer: Xilinx Inc
• Series: Spartan™-XLr

Specifications of XCS30XL-4VQ100I

• Number Of Logic Elements/cells: 1368
• Number Of Labs/clbs: 576
• Total Ram Bits: 18432
• Number Of I /o: 77
• Number Of Gates: 30000
• Voltage - Supply: 3 V ~ 3.6 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 100-TQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Spartan and Spartan-XL FPGA Families Data Sheet
Spartan-XL Family Global Buffer Switching Characteristic Guidelines
All devices are 100% functionally tested. Internal timing
parameters are derived from measuring internal test pat-
terns. Listed below are representative values where one
global clock input drives one vertical clock line in each
accessible column, and where all accessible IOB and CLB
flip-flops are clocked by the global clock net.
When fewer vertical clock lines are connected, the clock dis-
tribution is faster; when multiple clock lines per column are
driven from the same global clock, the delay is longer. For
54
Symbol
T
GLS
From pad through buffer, to any clock K
Description
www.xilinx.com
more specific, more precise, and worst-case guaranteed
data, reflecting the actual routing structure, use the values
provided by the static timing analyzer (TRCE in the Xilinx
Development System) and back-annotated to the simulation
netlist. These path delays, provided as a guideline, have
been extracted from the static timing analyzer report. All
timing parameters assume worst-case operating conditions
(supply voltage and junction temperature).
XCS05XL
XCS10XL
XCS20XL
XCS30XL
XCS40XL
Device
Max
1.4
1.7
2.0
2.3
2.6
-5
Speed Grade
DS060 (v1.8) June 26, 2008
Product Specification
Max
1.5
1.8
2.1
2.5
2.8
-4
Units
ns
ns
ns
ns
ns
R