XC5VLX50T-2FFG665I Xilinx Inc, XC5VLX50T-2FFG665I Datasheet - Page 91

IC FPGA VIRTEX-5 50K 665FCBGA

XC5VLX50T-2FFG665I

Manufacturer Part Number
XC5VLX50T-2FFG665I
Description
IC FPGA VIRTEX-5 50K 665FCBGA
Manufacturer
Xilinx Inc
Series
Virtex™-5 LXTr

Specifications of XC5VLX50T-2FFG665I

Number Of Logic Elements/cells
46080
Number Of Labs/clbs
3600
Total Ram Bits
2211840
Number Of I /o
360
Voltage - Supply
0.95 V ~ 1.05 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
665-BBGA, FCBGA
For Use With
HW-V5-ML561-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5-ML550-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5-ML521-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5GBE-DK-UNI-G - KIT DEV V5 LXT GIGABIT ETHERNET122-1508 - EVALUATION PLATFORM VIRTEX-5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
XC5VLX50T-2FFG665I
Manufacturer:
Xilinx Inc
Quantity:
10 000
Part Number:
XC5VLX50T-2FFG665I
Manufacturer:
XILINX
0
Company:
Part Number:
XC5VLX50T-2FFG665I
Manufacturer:
XILINX
Quantity:
270
Notice of Disclaimer
THE XILINX HARDWARE FPGA AND CPLD DEVICES REFERRED TO HEREIN ("PRODUCTS") ARE SUBJECT TO THE TERMS AND
CONDITIONS OF THE XILINX LIMITED WARRANTY WHICH CAN BE VIEWED AT http://www.xilinx.com/warranty.htm. THIS LIMITED
WARRANTY DOES NOT EXTEND TO ANY USE OF PRODUCTS IN AN APPLICATION OR ENVIRONMENT THAT IS NOT WITHIN THE
SPECIFICATIONS STATED IN THE XILINX DATA SHEET. ALL SPECIFICATIONS ARE SUBJECT TO CHANGE WITHOUT NOTICE.
PRODUCTS ARE NOT DESIGNED OR INTENDED TO BE FAIL-SAFE OR FOR USE IN ANY APPLICATION REQUIRING FAIL-SAFE
PERFORMANCE, SUCH AS LIFE-SUPPORT OR SAFETY DEVICES OR SYSTEMS, OR ANY OTHER APPLICATION THAT INVOKES
THE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR PROPERTY OR ENVIRONMENTAL DAMAGE ("CRITICAL
APPLICATIONS"). USE OF PRODUCTS IN CRITICAL APPLICATIONS IS AT THE SOLE RISK OF CUSTOMER, SUBJECT TO
APPLICABLE LAWS AND REGULATIONS.
DS202 (v5.3) May 5, 2010
Product Specification
12/02/08
12/19/08
01/14/09
02/06/09
04/01/09
06/25/09
05/05/10
Date
Version
4.10
4.8
4.9
5.0
5.1
5.2
5.3
• Added I
• In
• Changed Conditions for T
• In
• In
• In
• In
• In
• In
• In
• In
• Updated
• In
• In
• In
• In
• Changed document classification from Advance Product Specification to Product Specification.
• In
• In
• In
• In
• In
• In
• In
Removed DV
In
added table note 2 about R
In
In
Table
removed “2 byte or 4 byte interface” from the Conditions column for T
note 2 about R
In
In
Table
Table
Table
Table
Table
XC5VFX100T, and XC5VFX200T devices.
Production.
T
current.
DUTY_CYC_DLL
Table 5, page
Table 32, page
Table 35, page
Table 45, page
Table 46, page
Table 54, page
Table 55, page
Table 58, page
Table 59, page
Table 80, page
Table 1, page
Table 54, page
Table 55, page
Table 80, page
Table 1, page
Table 74, page
Table 65, page
Table 74, page
Table 2, page
Table 11, page
43, changed “GTXDRPCLK” to “GTX DCLK (DRP clock)” in the Description column. In
31, changed “GTPDRPCLK” to “GTP DCLK (DRP clock)” in the Description column. In
41, changed the maximum value of V
42, changed the minimum PLL frequency (F
51, changed the maximum value of AI
74, updated description of T
IN
Table 5, page 6
row to Absolute Maximum Ratings in
PPIN
XPPMTOL
from the examples in
and T
6, removed the Max columns and added note 2 about calculating the maximum startup
1, changed note 2 to refer to UG112 for soldering guidelines.
1, changed V
2, added note 6.
16, changed duty cycle values for T
18, updated R
23, updated parameters with separate FXT and TXT values.
23, corrected units of T
30, updated SX240T, FXT, and TXT speed grade designations.
31, updated SX240T and FXT rows.
37, added LVCMOS, 1.2V row.
38, corrected V
60, updated note 3 with sentence about global clock tree.
30, moved speed grades for the XC5VTX150T and XC5VTX240T devices to
31, added the ISE software version for the XC5VTX150T and XC5VTX240T devices.
60, moved the reference to the duty cycle distortion note to apply to both
55, removed LX20T from second row of F
44, changed “A – D input” to “AX – DX input” for the T
55, prepended “±” to all speed grade values for the T
9, changed V
.
DUTY_CYC_FX
XPPMTOL
with power-on current values for XC5VSX240T, XC5VTX150T, XC5VTX240T,
PHASE
www.xilinx.com
IN
Virtex-5 FPGA Data Sheet: DC and Switching Characteristics
CCAUX
XPPMTOL
and added note 5.
in
.
MEAS
FBDELAY
Table 32, page 16
.
Figure 2
to V
value for LVCMOS, 1.2V row.
LLSKEW
.
values, updated note 1, and added note 2.
CCO
ISE
DD
Revision
and
to 1000 mV.
to 13 mA.
in note 1.
Table 1, page
.
GPLLMIN
Figure
DCREF
and
7.
) to 1.48 GHz for all three speed grades. In
Table 44, page
OUTMAX
and added note 2.
1.
RX
.
and T
OUTDUTY
DICK
22.
TX
/T
. In
CKDI
parameter.
Table
parameter.
47, added table
Table
Table
45,
35,
91

Related parts for XC5VLX50T-2FFG665I