CY7C64713-56LFXC Cypress Semiconductor Corp, CY7C64713-56LFXC Datasheet - Page 52

• Manufacturer Part Number: CY7C64713-56LFXC
• Description: IC MCU USB EZ FX1 16KB 56VQFN
• Manufacturer: Cypress Semiconductor Corp
• Series: EZ-USB FX1™r

Specifications of CY7C64713-56LFXC

• Applications: USB Microcontroller
• Core Processor: 8051
• Program Memory Type: ROMless
• Controller Series: CY7C647xx
• Ram Size: 16K x 8
• Interface: I²C, USB, USART
• Number Of I /o: 24
• Voltage - Supply: 3.15 V ~ 3.45 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 56-VQFN Exposed Pad, 56-HVQFN, 56-SQFN, 56-DHVQFN
• Data Bus Width: 8 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, USART
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 3
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• For Use With: 428-1681 - KIT USB FX1 DEVELOPMENT BOARD428-1677 - KIT DEVELOPMENT EZ-USB FX2LP428-1339 - KIT LOW SPEED PERSONALITY BOARD
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 428-1680; CY7C64713-56LFXC

Quad Flat Package No Leads (QFN) Package
Design Notes
Electrical contact of the part to the Printed Circuit Board (PCB)
is made by soldering the leads on the bottom surface of the
package to the PCB. As a result, special attention is required to
the heat transfer area below the package to provide a good
thermal bond to the circuit board. A Copper (Cu) fill is to be
designed into the PCB as a thermal pad under the package. Heat
is transferred from the FX1 through the device’s metal paddle on
the bottom side of the package. Heat from here, is conducted to
the PCB at the thermal pad. It is then conducted from the thermal
pad to the PCB inner ground plane by a 5 x 5 array of via. A via
is a plated through hole in the PCB with a finished diameter of
13 mil. The QFN’s metal die paddle must be soldered to the
PCB’s thermal pad. Solder mask is placed on the board top side
over each via to resist solder flow into the via. The mask on the
top side also minimizes outgassing during the solder reflow
process.
Document #: 38-08039 Rev. *F
GAUGE PLANE
R 0.08 MIN.
0.20 MAX.
0.25
0.60±0.15
1.00 REF.
0°-7°
Figure 40. 128-Pin Thin Plastic Quad Flatpack (14 x 20 x 1.4 mm) A128
0° MIN.
0.20 MIN.
R 0.08 MIN.
DETAIL
1
0.20 MAX.
128
A
16.00±0.20
14.00±0.10
STAND-OFF
0.05 MIN.
0.15 MAX.
0.22±0.05
For further information on this package design please refer to
‘Application Notes for Surface Mount Assembly of Amkor's
MicroLeadFrame (MLF) Packages’. This can be found on
Amkor's website http://www.amkor.com.
The application note provides detailed information on board
mounting guidelines, soldering flow, rework process, and so on.
Figure 41
the package. The cross section is of only one via. The solder
paste template needs to be designed to allow at least 50% solder
coverage. The thickness of the solder paste template must be
5 mil. It is recommended that ‘No Clean’ type 3 solder paste is
used for mounting the part. Nitrogen purge is recommended
during reflow.
Figure 42
Figure 43
(darker areas indicate solder).
0.50
TYP.
NOTE:
1. JEDEC STD REF MS-026
2. BODY LENGTH DIMENSION DOES NOT INCLUDE MOLD PROTRUSION/END FLASH
3. DIMENSIONS IN MILLIMETERS
MOLD PROTRUSION/END FLASH SHALL NOT EXCEED 0.0098 in (0.25 mm) PER SIDE
BODY LENGTH DIMENSIONS ARE MAX PLASTIC BODY SIZE INCLUDING MOLD MISMATCH
on page 53 displays a cross-sectional area underneath
on page 53 displays an X-Ray image of the assembly
on page 53 is a plot of the solder mask pattern and
SEATING PLANE
(8X)
12°±1°
1.40±0.05
0.20 MAX.
1.60 MAX.
CY7C64713
SEE DETAIL
51-85101 *C
Page 52 of 55
A
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