PNX1500E/G,557 NXP Semiconductors, PNX1500E/G,557 Datasheet - Page 426

• Manufacturer Part Number: PNX1500E/G,557
• Description: IC MEDIA PROC 240MHZ 456-BGA
• Manufacturer: NXP Semiconductors

Specifications of PNX1500E/G,557

• Applications: Multimedia
• Core Processor: TriMedia
• Controller Series: Nexperia
• Interface: I²C, 2-Wire Serial
• Number Of I /o: 61
• Voltage - Supply: 1.14 V ~ 1.26 V
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 456-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Program Memory Type: -
• Ram Size: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 568-1296; 935277746557; PNX1500E/G

NXP Semiconductors
Volume 1 of 1
Table 20: QVCP 1 Registers
PNX15XX_PNX952X_SER_N_4
Product data sheet
Bit
1
0
Offset 0x10 EFE0
31:12
11
10
9
8
7
6
5
4
3
2
1
0
Offset 0x10 EFE4
31:24
23:0
Offset 0x10 EFE8
31:24
23:0
Offset 0x10 EFEC
31:24
23:0
Offset 0x10 EFF4
31
30:0
Offset 0x10 EFFC
31:16
Symbol
ddx_sel
enable
Unused
LAYER_DONE
BUF_DONE
FCU_UNDERFLOW
Unused
LAYER_DONE
BUF_DONE
FCU_UNDERFLOW
Unused
VINTB
VINTA
VBI_DONE_INT
VBI_PACKET_INT
Unused
Interrupt Enables
Unused
Interrupt Clears
Unused
Interrupt Sets
Powerdown
Unused
Module ID
Interrupt Status QVCP
Interrupt Enable QVCP
Interrupt Clear QVCP
Interrupt Set QVCP
Powerdown
Module ID
…Continued
Acces
s
R/W
R/W
R
R
R
R
R
R
R
R
R
R
R/W
W
W
R
R
1
0
-
0
0
0
0
0
0
0
0
0
0
-
0
-
0
-
0
0
-
0xA052
Value
Rev. 4.0 — 03 December 2007
Description
Selection of simple or improved first differentiating filter
Enable DCTI functionality
The layer has been completely displayed (layer 2)
DMA channel is done fetching all data for the current layer (layer 2)
Underflow in FCU FIFO for layer 2
The layer has been completely displayed (layer 1)
DMA channel is done fetching all data for the current layer (layer 1)
Underflow in FCU FIFO for layer 1
Vertical line interrupt issued if Y position matches VLINTB
Vertical line interrupt issued if Y position matches VLINTA
VBI/Register load is done with the current packet list
VBI/Register reload has sent a packet with the IRQ request bit set in
the packet header
A ‘1’ in the appropriate bit will enable the interrupt according to the
specification in register 0xFE0.
A ‘1’ in the appropriate bit will clear the interrupt according to the
specification in register FE0.
A ‘1’ in the appropriate bit will set the interrupt according to the
specification in register FE0.
This bit has no effect i.e., there is no powerdown implemented for
this module.
Unique revision number
1 = Improved
0 = Simple
1 = Enable DCTI
0 = Bypass DCTI
PNX15xx/952x Series
Chapter 11: QVCP
© NXP B.V. 2007. All rights reserved.
11-426