PNX1500E/G,557 NXP Semiconductors, PNX1500E/G,557 Datasheet - Page 534
PNX1500E/G,557
Manufacturer Part Number
PNX1500E/G,557
Description
IC MEDIA PROC 240MHZ 456-BGA
Manufacturer
NXP Semiconductors
Specifications of PNX1500E/G,557
Applications
Multimedia
Core Processor
TriMedia
Controller Series
Nexperia
Interface
I²C, 2-Wire Serial
Number Of I /o
61
Voltage - Supply
1.14 V ~ 1.26 V
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
456-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Program Memory Type
-
Ram Size
-
Lead Free Status / Rohs Status
Compliant
Other names
568-1296
935277746557
PNX1500E/G
935277746557
PNX1500E/G
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PNX15XX_PNX952X_SER_N_4
Product data sheet
Figure 3:
Figure 4:
WS
WS
SCK
SCK
SD
SD
Audio In Serial Frame and Bit Position Definition (POLARITY = 1, CLOCK_EDGE = 0, EARLYMODE = 0)
Audio In Serial Frame and Bit Position Definition (POLARITY = 1, CLOCK_EDGE = 0, EARLYMODE = 1)
0
0
1
1
2
2
3
3
4
4
5
Each subsequent clock edge defines a new bit position. Other combinations of
POLARITY and CLOCK_EDGE can be used to define a variety of serial frame bit
position definitions. Further if the EARLYMODE = 1, then the first data bit (position 0)
will be the data bit sampled in the same clock edge in which the WS signal transition
is detected.(See
The capturing of samples is governed by FRAMEMODE. If FRAMEMODE = 00,
every serial frame results in one sample from the serial-parallel converter. A sample
is defined as a left/right pair in stereo modes or a single left channel value in mono
modes. If FRAMEMODE = 1y, the serial frame data bit in bit position VALIDPOS is
examined. If it has value ‘y’, a sample is taken from the data stream (the valid bit is
allowed to precede or follow the left or right channel data provided it is in the same
serial frame as the data).
The left and right sample data can be in a LSB-first or MSB-first form at an arbitrary
bit position and with an arbitrary length. (See
serial-to-parallel converter assigns the value of the bit at LEFTPOS to LEFT[MSB].
Subsequent bits are assigned, in order, to decreasing bit positions in the LEFT data
word, up to and including LEFT[SSPOS]. Bits LEFT[SSPOS–1:0] are cleared. Hence,
in MSB-first mode, an arbitrary number of bits are captured. They are left-adjusted in
the 16(32)-bit parallel output of the converter.
In LSB-first mode, the serial to parallel converter assigns the value of the bit at
LEFTPOS to LEFT[SSPOS]. Subsequent bits are assigned, in order, to increasing bit
positions in the LEFT data word, up to and including LEFT[MSB]. Bits LEFT[SSPOS–
1:0] are cleared. Hence, in LSB-first mode, an arbitrary number of bits are captured.
They are returned left-adjusted in the 16(32)-bit parallel output of the converter.
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Rev. 4.0 — 03 December 2007
Section
4..)
frame
frame
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19 20 21 22 23 24 25
n
n
Section
26 27 28 29 30 31 0
26 27 28 29 30 31 0
PNX15xx/952x Series
4..) In MSB-first mode, the
Chapter 16: Audio Input
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frame
frame
2
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© NXP B.V. 2007. All rights reserved.
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