SL11R Cypress Semiconductor Corp, SL11R Datasheet - Page 33

• Manufacturer Part Number: SL11R
• Description: IC MCU FULL SPD USB 16B 100LQFP
• Manufacturer: Cypress Semiconductor Corp

Specifications of SL11R

• Applications: USB Microcontroller
• Core Processor: RISC
• Program Memory Type: Mask ROM (6 kB)
• Controller Series: USB Controller
• Ram Size: 3Kx8
• Interface: 2-Wire Serial, UART, USB
• Number Of I /o: 32
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: 0°C ~ 65°C
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 428-1462

4.15
The SL11R Controller has two built in programmable timers that can provide an interrupt to the SL11R Engine. The timers
decrement on every microsecond clock tick. An interrupt occurs when the timer reaches zero.
4.15.1
The SL11R BIOS uses the timer 0 for time-out function and power down mode. At the end of the power up, the SL11R BIOS
disables the timer 0 interrupt. If you wish to use timer 0 for power down function, see the [Ref. 1] SL11R_BIOS for more
information.
4.15.2
The SL11R timer 1 is for user applications. The SL11R BIOS does not use this timer.
4.15.3
The SL11R provides a Watchdog timer to monitor certain activities. The Watchdog timer can also interrupt the SL11R processor.
The default value of this register is 0x0000.
Notes:
4.16
The SL11R CPU supports suspend, resume and CPU low power modes. The SL11R BIOS assigns GPIO29 for the USB DATA+
line pull-up (This pin can simulate USB cable removal or insertion while USB power is still applied to the circuit) and the GPIO20
Document #: 38-08006 Rev. **
• You must assert Reset Count (RC), before time-out occurs to avoid Watchdog trigger
• The Watchdog Timer overflow causes an internal processor reset. The Processor can read the WT bit after exiting reset to
• The WT value will be cleared on the next external reset.
determine if the WT bit is set. If it is set, a watchdog time-out occurred.
D15-0
D15-0
D5
D4-3
D2
D1
D0
General Timers and Watch Dog Timer
Timer 0 Count Register (0xC010: R/W)
Timer 1 Count Register (0xC012: R/W)
Watchdog Timer Count & Control Register (0xC00C: R/W)
D15
Special GPIO Function for Suspend, Resume and Low-Power modes
0
D15
T15
D15
T15
D14
0
D14
T14
D14
T14
T15-0
T15-0
WT
TO1-0
EP
ENB
RC
D13
0
D13
D13
T13
T13
D12
0
D12
T12
D12
T12
D11
0
Timer Count value.
Timer Count value
Watchdog Time-out occurred.
Time-out Count:
Enable Permanent WD timer. If set =’1’
WD timer is always enabled. Cleared only on Reset.
Enable WD Timer operation when =’1’.
Reset Count. When set = ’1’.
D11
D11
T11
T11
D10
0
D10
D10
T10
T10
D9
0
D9
T9
D9
T9
D8
00
01
10
11
0
D8
T8
D8
T8
D7
0
D7
T7
D7
T7
01 milliseconds
04 milliseconds
16 milliseconds
64 milliseconds
D6
0
D6
D6
T6
T6
WT
D5
D5
D5
T5
T5
TO1
D4
D4
D4
T4
T4
TO0
D3
D3
D3
T3
T3
D2
D2
T2
ENB
T2
D2
D1
D1
T1
T1
D1
EP
D0
D0
T0
T0
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RC
D0
SL11R