SL11R Cypress Semiconductor Corp, SL11R Datasheet - Page 51

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SL11R

Manufacturer Part Number
SL11R
Description
IC MCU FULL SPD USB 16B 100LQFP
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of SL11R

Applications
USB Microcontroller
Core Processor
RISC
Program Memory Type
Mask ROM (6 kB)
Controller Series
USB Controller
Ram Size
3Kx8
Interface
2-Wire Serial, UART, USB
Number Of I /o
32
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
0°C ~ 65°C
Mounting Type
Surface Mount
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
428-1462

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GPIO and 8/16-Bit DMA Modes—Pin Assignment and Description (continued)
Document #: 38-08006 Rev. **
UART_RXD
PWR_OFF
Pin Name
PWM3, or
IRQ1 (in)
IRQ0 (in)
nWRITE
nREAD
PWM2
PWM1
PWM0
DATA+
DREQ
ADDR
DATA-
GND1
SD15
SD14
SD13
SD12
SD10
SD11
VDD1
GND
GND
GND
VDD
nCS
SD9
SD8
SD7
SD6
SD5
SD4
SD3
SD2
SD1
Pin No. GPIO Pins Pin Type
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
GPIO27
GPIO26
GPIO25
GPIO24
GPIO23
GPIO22
GPIO21
GPIO20
GPIO19
GPIO18
GPIO17
GPIO16
GPIO15
GPIO14
GPIO13
GPIO12
GPIO10
GPIO11
GPIO9
GPIO8
GPIO7
GPIO6
GPIO5
GPIO4
GPIO3
GPIO2
GPIO1
Power
Power
GND
GND
Input
GND
GND
Bidir
Bidir
Bidir
Bidir
Bidir
Bidir
Bidir
Bidir
Bidir
Bidir
Bidir
Bidir
Bidir
Bidir
Bidir
Bidir
Bidir
Bidir
Bidir
Bidir
Bidir
Bidir
Bidir
Bidir
Bidir
Bidir
Bidir
Bidir
Digital ground.
Digital ground.
UART Receive Data (in), or GPIO27
This signal can be used for device low-power mode, it will turn off or disable
external powers to the peripheral in suspend mode. Once USB power is
resumed, external power can be enabled again
GPIO25, or IRQ1 (in) interrupts the SL11R processor
IRQ0 (in) interrupts the SL11R processor or PWM.
See the PWM Control register set-up for more information
Same as above or GPIO23
Same as above or GPIO22
Same as above or GPIO21
DMA Request Enable. DREQ indicates that SL11R is ready to accept or send
data from/to an external device. DREQ along with nCS, nWRITE and nREAD
bits are the DMA handshake signals for the main SDATA port, or GPIO20.
ADDR =1, Read/Write data from the INBUF/OUTBUFF, ADDR=0 read data
from the STATUS register, or GPIO19
+3.3 VDC Supply
CS (in) Active LOW, Selects the bidirectional SDATA Port, or GPIO18
Active input LOW signal used to indicate write data transfers to the general
bidirectional SD15-0 Data Port. Signal is driven high for read transfers to the
SL11R, or GPIO17
Active LOW input signal used to indicate read data transfers from the general
bidirectional SD15-0 Data Port. Or GPIO16
Digital ground.
Main bidirectional SDATA port bit 15, or GPIO15
Main bidirectional SDATA port bit 14, or GPIO14
Main bidirectional SDATA port bit 13, or GPIO13
Main bidirectional SDATA port bit 12, or GPIO12
Main bidirectional SDATA port bit 11, or GPIO11
Main bidirectional SDATA port bit 10, or GPIO10
Main bidirectional SDATA port bit 9, or GPIO9
USB +3.3 VDC Supply.
USB Differential DATA Signal High Side.
USB Differential DATA Signal Low Side.
USB Digital Ground.
Main bidirectional SDATA port bit 8, or GPIO8
Main bidirectional SDATA port bit 7, or GPIO7
Main bidirectional SDATA port bit 6, or GPIO6
Main bidirectional SDATA port bit 5, or GPIO5
Main bidirectional SDATA port bit 4, or GPIO4
Main bidirectional SDATA port bit 3, or GPIO3
Main bidirectional SDATA port bit 2, or GPIO2
Main bidirectional SDATA port bit 1, or GPIO1
GPIO & 8/16-bit DMA modes Pin Chip Revision 1.1
Page 51 of 85
SL11R

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