SL11R Cypress Semiconductor Corp, SL11R Datasheet - Page 55

• Manufacturer Part Number: SL11R
• Description: IC MCU FULL SPD USB 16B 100LQFP
• Manufacturer: Cypress Semiconductor Corp

Specifications of SL11R

• Applications: USB Microcontroller
• Core Processor: RISC
• Program Memory Type: Mask ROM (6 kB)
• Controller Series: USB Controller
• Ram Size: 3Kx8
• Interface: 2-Wire Serial, UART, USB
• Number Of I /o: 32
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: 0°C ~ 65°C
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 428-1462

DVC 8-Bit DMA Mode Pin Assignment and Description (continued)
Document #: 38-08006 Rev. **
Pin Name
nRESET
nWRH
nWRL
nRAS
TEST
GND
GND
VDD
VDD
VDD
nRD
D10
D12
D13
D14
D15
D11
A20
A19
A18
A17
A16
A15
A14
A13
A12
A11
A10
D9
X1
X2
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
Pin No.
14
40
46
47
11
12
13
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
41
42
43
44
45
48
49
50
51
GPIO pins
Pin Type
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Power
Power
Power
GND
Input
GND
Input
Input
Bidir
Bidir
Bidir
Bidir
Bidir
Bidir
Bidir
Active LOW, Write to upper bank of External SRAM
External Memory Data Bus, Data9
Digital ground.
External 48-MHz Crystal or Clock Input.
External crystal output. No connection when X1 is used for clock input
+3.3 VDC Supply
External Memory Address Bus, A20
External Memory Address Bus, A19
External Memory Address Bus, A18
External Memory Address Bus, A17
External Memory Address Bus, A16
External Memory Address Bus, A15
External Memory Address Bus, A14
External Memory Address Bus, A13
External Memory Address Bus, A12
External Memory Address Bus, A11
External Memory Address Bus, A9
External Memory Address Bus, A8
External Memory Address Bus, A7
External Memory Address Bus, A6
External Memory Address Bus, A5
External Memory Address Bus, A4
External Memory Address Bus, A3
Digital ground.
External Memory Address Bus, A2
External Memory Address Bus, A1
External Memory Address Bus, A0
No Connection, MFG test only
Active LOW, write to lower bank of External SRAM
Active LOW, Read from External SRAM or ROM
Master Reset. SL11R Device active low reset input.
Active LOW, DRAM Row Address Select
+3.3 VDC Supply
+3.3 VDC Supply
External Memory Data Bus, Data10
External Memory Data Bus, Data11
External Memory Data Bus, Data12
External Memory Data Bus, Data13
External Memory Data Bus, Data14
External Memory Data Bus, Data15
External Memory Address Bus, A10
GPIO & DVC 8-bit DMA modes Pin Chip Revision 1.1
Page 55 of 85
SL11R