MC68EC060RC50 Freescale Semiconductor, MC68EC060RC50 Datasheet - Page 205

IC MPU 32BIT 50MHZ 206-PGA

MC68EC060RC50

Manufacturer Part Number
MC68EC060RC50
Description
IC MPU 32BIT 50MHZ 206-PGA
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of MC68EC060RC50

Processor Type
M680x0 32-Bit
Speed
50MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
206-PGA
Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
50MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
3.3V
Operating Supply Voltage (max)
3.465V
Operating Supply Voltage (min)
3.135V
Operating Temp Range
0C to 110C
Operating Temperature Classification
Commercial
Mounting
Through Hole
Pin Count
206
Package Type
PGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68EC060RC50
Manufacturer:
NXP
Quantity:
1 746
Bus Operation
The MC68060 considers the resulting second, third, and fourth long-word bus cycles of a
burst-inhibited line transfer as part of the original line transfer cycle. Therefore, the MC68060
interprets a retry termination during these bus cycles as though they were part of the original
line transfer, and depending on the acknowledge termination mode, a retry termination is
either interpreted as a bus error (MC68040 mode) or ignored (native-MC68060 mode).
Negating the bus grant (BG) signal on the MC68060 while indicating a retry termination pro-
vides a relinquish and retry operation for any bus cycle that can be retried (see Figure 7-44).
If retrying a bus cycle that is part of a locked sequence of bus cycles, a relinquish and retry
of the bus requires BGR be asserted along with BG negated to cause the processor to abort
any following locked bus cycles that are a part of the locked sequence.
7-50
NATIVE-MC68060
ACKNOWLEDGE
ACKNOWLEDGE
TERMINATION
TERMINATION
MC68040
MISCELLANEOUS
MODE
MODE
ATTRIBUTES
SIZ1–SIZ0
Figure 7-39. Retry Read Bus Cycle Timing
A31–A0
D31–D0
BCLK
R/W
TEA
TEA
SAS
TIP
TRA
TRA
TS
TA
TA
M68060 USER’S MANUAL
C1
RETRY SIGNALED
READ CYCLE
CW
C2
LONG
C1
RETRY
CYCLE
C2
MOTOROLA

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