MC68EC060RC50 Freescale Semiconductor, MC68EC060RC50 Datasheet - Page 83

• Manufacturer Part Number: MC68EC060RC50
• Description: IC MPU 32BIT 50MHZ 206-PGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68EC060RC50

• Processor Type: M680x0 32-Bit
• Speed: 50MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 206-PGA
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 50MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 3.3V
• Operating Supply Voltage (max): 3.465V
• Operating Supply Voltage (min): 3.135V
• Operating Temp Range: 0C to 110C
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Pin Count: 206
• Package Type: PGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

Memory Management Unit
Physical Address—
S—Supervisor Protected
Page Table Address
U—Used
U0, U1—User Page Attributes
UDT—Upper Level Descriptor Type
UR—User Reserved
W—Write Protected
4-14
This 20-bit field contains the physical base address of a page in memory. The logical
address supplies the low-order bits of the address required to index into the page. When
the page size is 8-Kbyte, the least significant bit of this field is not used.
This bit identifies a page as supervisor only. Only programs operating in the supervisor
mode are allowed to access the portion of the logical address space mapped by this
descriptor when the S-bit is set. If the bit is clear, both supervisor and user accesses are
allowed.
This field contains the physical base address of a table of page descriptors. The low-order
bits of the address required to index into the page table are supplied by the logical
address.
The processor automatically sets this bit when a descriptor is accessed in which the U-bit
is clear. In a page descriptor table, this bit is set to indicate that the page corresponding
to the descriptor has been accessed. In a pointer table, this bit is set to indicate that the
pointer has been accessed by the MC68060 as part of a table search. The U-bit is
updated before the MC68060 allows a page to be accessed. The processor never clears
this bit.
These bits are user defined and the processor does not interpret them. U0 and U1 are
echoed to the UPA0 and UPA1 signals, respectively, if an external bus transfer results
from the access. Applications for these bits include extended addressing and snoop pro-
tocol selection.
These bits indicate whether the next level table descriptor is resident.
These single bit fields are reserved for use by the user.
Setting the W-bit in a table descriptor write protects all pages accessed with that descrip-
tor. When the W-bit is set, a write access or a locked read-modify-write access to the log-
ical address corresponding to this entry causes an access error exception to be taken.
00 or 01 = Invalid
10 or 11 = Resident
These codes indicate that the table at the next level is not resident or that the log-
ical address is out of bounds. All other bits in the descriptor are ignored. When an
invalid descriptor is encountered, an ATC entry is not created.
These codes indicate that the page is resident.
M68060 USER’S MANUAL
MOTOROLA