MC68EC000EI16 Freescale Semiconductor, MC68EC000EI16 Datasheet - Page 495
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MC68EC000EI16
Manufacturer Part Number
MC68EC000EI16
Description
IC MPU 32BIT 16MHZ 68-PLCC
Manufacturer
Freescale Semiconductor
Specifications of MC68EC000EI16
Processor Type
M680x0 32-Bit
Speed
16MHz
Voltage
3.3V, 5V
Mounting Type
Surface Mount
Package / Case
68-PLCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
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Price
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Manufacturer:
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PFLUSHR
Operation:
Assembler
Syntax:
Attributes:
Description: The quad word pointed to by < ea > is regarded as a previously used value of
Instruction Format:
MOTOROLA
15
1
1
the CPU root pointer register. The root pointer table entry matching this CPU root
pointer register (if any) is flushed, and all address translation cache entries loaded with
this value of CPU root pointer register (except for those that are globally shared) are
invalidated. If no entry in the root pointer table matches the operand of this instruction,
no action is taken.
If the supervisor root pointer is not in use, the operating system should not issue the
PFLUSHR command to destroy a task identified by the current CPU root pointer reg-
ister. It should wait until the CPU root pointer register has been loaded with the root
pointer identifying the next task until using the PFLUSHR instruction. At any time, exe-
cution of the PFLUSHR instruction for the current CPU root pointer register causes the
current task alias to be corrupted.
14
1
0
13
1
1
12
1
0
M68000 FAMILY PROGRAMMER’S REFERENCE MANUAL
If Supervisor State
Else TRAP
PFLUSHR < ea >
Unsized
Then RPT Entry (If Any) Matching Root Pointer Specified by < ea >
Corresponding Address Translation Cache Entries Are Invalidated
11
Invalidate ATC and RPT Entries
0
0
10
0
0
9
0
0
(MC68851)
8
0
0
7
0
0
6
0
0
Supervisor (Privileged) Instructions
5
0
MODE
4
0
EFFECTIVE ADDRESS
PFLUSHR
3
0
2
0
REGISTER
1
0
6-41
0
0
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