MC68EC000EI16 Freescale Semiconductor, MC68EC000EI16 Datasheet - Page 96

• Manufacturer Part Number: MC68EC000EI16
• Description: IC MPU 32BIT 16MHZ 68-PLCC
• Manufacturer: Freescale Semiconductor

Specifications of MC68EC000EI16

• Processor Type: M680x0 32-Bit
• Speed: 16MHz
• Voltage: 3.3V, 5V
• Mounting Type: Surface Mount
• Package / Case: 68-PLCC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

3.5.2 Rounding the Result
The FPU supports the four rounding modes specified by the IEEE 754 standard. These
modes are round to nearest (RN), round toward zero (RZ), round toward plus infinity (RP),
and round toward minus infinity (RM). The RM and RP rounding modes are often referred
to as "directed rounding modes" and are useful in interval arithmetic. Rounding is
accomplished through the intermediate result. Single-precision results are rounded to a 24-
bit boundary; double-precision results are rounded to a 53-bit boundary; and extended-
precision results are rounded to a 64-bit boundary. Table 3-21 lists the encodings for the
FPCR that denote the rounding and precision modes.
Rounding the intermediate result’s mantissa to the specified precision and checking the 16-
bit intermediate exponent to ensure that it is within the representable range of the selected
rounding precision accomplishes range control. Range control is a method used to assure
correct emulation of a device that only supports single- or double- precision arithmetic. If the
intermediate result’s exponent exceeds the range of the selected precision, the exponent
value appropriate for an underflow or overflow is stored as the result in the 16-bit extended-
precision format exponent. For example, if the data format and rounding mode is single
precision RM and the result of an arithmetic operation overflows the magnitude of the single-
precision format, the largest normalized single-precision value is stored as an extended-
precision number in the destination floating-point data register (i.e., an unbiased 15-bit
exponent of $00FF and a mantissa of $FFFFFF0000000000). If an infinity is the appropriate
result for an underflow or overflow, the infinity value for the destination data format is stored
as the result (i.e., an exponent with the maximum value and a mantissa of zero).
Figure 3-2 illustrates the algorithm that the FPU uses to round an intermediate result to the
selected rounding precision and destination data format. If the destination is a floating-point
register, either the selected rounding precision specified by the FPCR PREC status byte or
by the instruction itself determines the rounding boundary. For example, FSADD and
FDADD specify single- and double-precision rounding regardless of the precision specified
in the FPCR PREC status byte. If the destination is external memory or an integer data
register, the destination data format determines the rounding boundary. If the rounded result
of an operation is not exact, then the INEX2 bit is set in the FPSR EXC status byte.
MOTOROLA
To Minus Infinity (RM)
To Plus Infinity (RP)
Rounding Mode
To Nearest (RN)
M68000 FAMILY PROGRAMMER’S REFERENCE MANUAL
(RND Field)
To Zero (RZ)
Table 3-21. FPCR Encodings
Encoding
0
0
1
1
0
1
0
1
Rounding Precision
(PREC Field)
Double (D)
Extend (X)
Undefined
Single (S)
Instruction Set Summary
3-25