MC68030CRC25C Freescale Semiconductor, MC68030CRC25C Datasheet - Page 216
![no-image](/images/manufacturer_photos/0/2/262/freescale_semiconductor_sml.jpg)
MC68030CRC25C
Manufacturer Part Number
MC68030CRC25C
Description
IC MPU 32BIT ENHANCED 128-PGA
Manufacturer
Freescale Semiconductor
Datasheet
1.MC68030FE20C.pdf
(599 pages)
Specifications of MC68030CRC25C
Processor Type
M680x0 32-Bit
Speed
25MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
128-PGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
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J
I
MOTOROLA
2) LATCH DATA
3) NEGATE AS AND DS
4) NEGATE DBEN
3) DRIVE ADDRESS ON AO-A31 (IF DIFFERENT)
4) DRIVE SIZE (SIZO-SIZ1)
5) CLOUT BECOMES VAUD
6) ASSERT
8) PLACE DATA ON O0-D31
9) ASSERT O' S (IF WAIT STATES)
2) REMOVE DATA FROM DO-D31
3) NEGATE OBEN
1) ASSERT ECS/OCS FOR ONE-HALF CLOCK
2) DRLVE R/WTO REAO
3) DRIVE FUNCTION CODE ON FCO-FC2
4) DRIVE ADDRESS ON AO-A31
5) DRIVE SIZE (SIZO-SIZ1)
6) CACHE INHIBIT OUT (CLOUT) BECOMES VALID
7) ASSERT ADDRESS STROBE (~)
8) ASSERT DATA STROBE (~)
9) ASSERT DATA GUFFER ENABLE (O~BEN)
I)
5) START DATA MODIFICATION
1) ASSERT ECS/OCS FOR ONE-HALF CLOCK
2) SETR~TO WRITE
7) ASSERT DREN
1) NEGATE AS (AND DE)
1) NEGATE RMC
1) ASSERT READ-MODIFY-WRITE CYCLE (RMC)
SAMPLE CACHE INHIRIT IN (CI!N)
TERMINATE OUTPUT TRANSFER
TERMINATE INPUT TRANSFER
START OUTPUT TRANSFER
START INPUT TRANSFER
START NEXT CYCLE
Figure 7-35. Synchronous Read-Modify-Write Cycle Flowchart
UNLOCK BUS
PROCESSOR
LOCK RUE
E
- -
I
MC68030 USER'S MANUAL
2) PLACE DATA ON DO~D31
3) ASSERT SYNCHRONOUS TERMINATION
1) REMOVE DATAFROM 00-031
2) NEGATE STERM
1) DECODE ADORESS
2) STORE DATA FROM DO-D31
3) ASSERT STERM
1) NEGATE STERM
1) DECODE ADDRESS
(STERM)
TERMINATE CYCLE
TERMINATE CYCLE
EXTERNAL DEVICE
PRESENT DATA
ACCEPT DATA
IF CAS2 INSTRUCTION AND
THEN GO TO (~); IF
THEN GO_TO ®;
WRI~EN, THEN GO TO ® :
ELSE GO TO ®
ONLY ONE OPERANO READ.
OPERANDS DO NOT MATCH.
GOTO@
IF CAS2 INSTRUCTION AND
ONLY ONE OPERANO
®
®
®
®
ELSE
®
7-55
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