MC68030CRC25C Freescale Semiconductor, MC68030CRC25C Datasheet - Page 477
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MC68030CRC25C
Manufacturer Part Number
MC68030CRC25C
Description
IC MPU 32BIT ENHANCED 128-PGA
Manufacturer
Freescale Semiconductor
Datasheet
1.MC68030FE20C.pdf
(599 pages)
Specifications of MC68030CRC25C
Processor Type
M680x0 32-Bit
Speed
25MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
128-PGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
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11
11-14
When using the fetch immediate effective address (flea) or the calculate
The total head of some effective address types extends through the effective
where:
An example using the flea table and the X + op head notation is:
since there were no effective address (ea) additions. Therefore, Equation
immediate effective address (ciea) tables, the size of the data is significant
data, #<data>.W, and for long data, #<data>.L.
address calculation and includes the head of the operation. These effective
address calculations are marked in the head column as follows:
Notice that the last instruction did not require the general Equation (11-2)
(11-1) is used:
in the timing calculations. For each effective address, a line is listed for word
The following calculations use the general Equation (11-2):
X is the head of the effective address alone.
2.
1.
Execution Time =CCea 1 +[CCop 1 -min(HoPl,Teal]+[CCea2-min(Hea2,TOPl)]+
ADDI.L #$6000FF, D1
EORI.W #$400,- (A1)
flea
EORI #<data>,Mem
flea #<data>.L, D1
ADDI #<data>,Dn
# < d a t a > . W ,
= 4 + [3- min(0,2)] + [4- min(6,1)] + [2- min(2,0)]
=4+3+3+2
= 12 clock periods
[CCoP2 - min(HoP2,Tea2) ]
-
2.
MC68030 USER'S MANUAL
1.
(An)
CCoP5- min(HoP5,ToP4 )
EORI.W
ADDI.L
X + op head
Instruction
#$400,- (A1)
#$6000FF,D1
4+op head
2(op head)
Head
2
0
6
Tail
2
0
0
0
1
MOTOROLA
CC
4
4
3
4
2
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