IDTSTAC9752AXTAED1X IDT, Integrated Device Technology Inc, IDTSTAC9752AXTAED1X Datasheet - Page 62

• Manufacturer Part Number: IDTSTAC9752AXTAED1X
• Description: IC CODEC AC'97 MIC/JACK 48-QFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Audio Codec '97r

Specifications of IDTSTAC9752AXTAED1X

• Resolution (bits): 20 b
• Number Of Adcs / Dacs: 2 / 2
• Sigma Delta: Yes
• S/n Ratio, Adcs / Dacs (db) Typ: 85 / 92
• Voltage - Supply, Analog: 3.14 V ~ 3.47 V; 4.75 V ~ 5.25 V
• Voltage - Supply, Digital: 3.14 V ~ 3.47 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 48-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: STAC9752AXTAED1X

IDT™
AC’97 2.3 CODECS WITH STEREO MICROPHONE & UNIVERSAL JACK
STAC9752A/9753A
AC’97 2.3 CODECS WITH STEREO MICROPHONE & UNIVERSAL JACK
7.1.18.
Bit(s) Reset Value
10:4
Bit(s)
3:0
7:4
15
14
13
12
11
10
9
8
3
2
EAPD
D15
D7
Powerdown Ctrl/Stat (26h)
Default: 000Fh
Reset Value
0
0
0
0
0
0
0
0
0
0
0
1
1
D14
PR6
D6
Read / Write
Read Only
Access
Reserved
Reserved
Name
EAPD
PR6
PR5
PR4
PR3
PR2
PR1
PR0
REF
ANL
PR5
D13
D5
Reserved
PG3:PG0
Name
1 = Forces EAPD pad to Vdd
0 = Forces EAPD pad to GND
0 = Headphone Amp powered up
1 = Headphone Amp powered down
0 = Digital Clk active
1 = Digital Clk disable.
0 = Digital active
1 = Powerdown: PLL, AC-Link, Xtal oscillator;
0 = VREF and VREFOUT are active
1 = VREF and VREFOUT are powered down, and PR2 is asserted in
analog block
0 = Analog active
1 = All signal path analog is powered down
0 = DAC powered up
1 = DAC powered down
0 = ADC powered up
1 = ADC powered down
Bit not used, should read back 0
Read Only --- VREF status
1 = VREF’S enabled
Read Only ---- ANALOG MIXERS, etc. Status
1 = analog mixers ready.
PR4
D12
62
D4
Bits not used, should read back 0
Page Selector
0h = Vendor Specific
1h = Page ID 01 (See Section 7.4 for additional information on the
Paging Registers)
.........
Fh = Reserved Pages
This register is used to select a descriptor of 16 word pages
between registers 60h to 6Fh. Value 0h is used to select vendor
specific space to maintain compatibility with AC’97 2.2 vendor
specific registers.
System Software determines implemented pages by writing the
page number and reading the value back. All implemented pages
must be consecutive. (i.e., page 2h cannot be implemented without
page 1h).
These registers are not reset on RESET#.
PR3
REF
D11
D3
Description
STAC9752A/9753A
Description
D10
PR2
ANL
D2
DAC
PR1
D9
D1
PC AUDIO
ADC
PR0
V 1.5 1206
D8
D0